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Signed-off-by: Girish Mahadevan <gmahadevan@nvidia.com>
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Add a common Error Record Serialization Table (ERST) generator based on
the ACPI 6.6 definition. Introduce an architecture-common Configuration
Manager object to provide serialization instruction entries.
Validate actions, instructions, flags, register masks, action grouping,
and GOTO targets before generating the table.
Signed-off-by: Amrathesh <amrathesh@arm.com>
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Add a common Boot Error Record Table (BERT) generator based on the
ACPI 6.6 definition. Introduce an architecture-common Configuration
Manager object that provides the boot error region address and length.
Signed-off-by: Amrathesh <amrathesh@arm.com>
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Signed-off-by: Girish Mahadevan <gmahadevan@nvidia.com>
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Several fields are missing from the GICv5 Configuration Manager object
parsers, including those used for SRAT.
Add the missing fields.
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
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Generate GICv5 related information in IORT table.
Continuous-integration-options: PatchCheck.ignore-multi-package
Co-Developed-by: Yeoreum Yun <yeoreum.yun@arm.com>
Signed-off-by: Sarah Walker <Sarah.Walker2@arm.com>
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Generate GICv5 related information in MADT table.
Signed-off-by: Sarah Walker <Sarah.Walker2@arm.com>
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Signed-off-by: Girish Mahadevan <gmahadevan@nvidia.com>
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Signed-off-by: Girish Mahadevan <gmahadevan@nvidia.com>
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Extend the CMN Configuration Manager object with an implementation type
and optional root-node region length.
Map the implementation type to the ACPI hardware IDs for CMN-600,
CMN-650, CMN-700 and CMN-S3. Apply CMN-600-specific address restrictions
only when the CMN-600 implementation type is selected.
Rename the CMN-600 generator, identifiers and files to reflect support
for multiple CMN implementations.
Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
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Rename the DMC-620 PMU generator and its Configuration Manager objects
to remove the DMC-620-specific naming.
Update the generator ID, library paths, parser definitions and associated
documentation to use generic DMC PMU terminology.
Signed-off-by: Varshit Pandya <Varshit.Pandya@arm.com>
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Add SMBIOS Type 42 related CM object structures
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
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Add MSCT maximum physical address configuration object and
update parser to handle the new object type.
Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
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Define TableHelperLib field parsers for all LoongArch64 Configuration
Manager objects. Also dispatch the LoongArch64 namespace through
ParseCmObjDesc() so CM debug output can print these objects instead of
reporting the namespace as unsupported.
Signed-off-by: Dongyan Qian <qiandongyan@loongson.cn>
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To generate Arm Performance Moniteroing Unit Table (APMT), introduce
Arm coresight PMU CM object.
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
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Add missing CmRiscVProcessorSpecificBlockInfo Parser.
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
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Add missing CmX64ProcessorSpecificBlockInfo Parser.
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
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Add missing CmArchCommonProcessorSpecificBlockInfo Parser.
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
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Add missing CmArmProcessorSpecificBlockInfo Parser.
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
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Add missing CmArmProcessorSpecificSubDataArchInfo parser.
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
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Add a new StaToken field to CM_ARCH_COMMON_PROC_HIERARCHY_INFO
CmObj, allowing to describe the ASL "_STA" value the processor
or processor container should return.
CM_X64_LOCAL_APIC_X2APIC_INFO.StaToken already allows to reference
a StaToken from a X2APIC CmObj. If ProcHierarchy objects are used,
the SSDT CPU topology table will be generated using the X2APIC
objects, so the new field should not collide with the new one.
Add a note to CM_X64_LOCAL_APIC_X2APIC_INFO.StaToken
to handle this case.
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
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Signed-off-by: Girish Mahadevan <gmahadevan@nvidia.com>
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Signed-off-by: Girish Mahadevan <gmahadevan@nvidia.com>
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Add the Configuration Manager objects required to describe SMBIOS
Additional Information (Type 40) structures.
The top-level object references a list of Additional Information entries.
Each entry identifies a field in an existing SMBIOS structure and
references a typed value object containing the additional data.
Define the maximum value buffer size from the SMBIOS Type 40 formatted
length limit and add parsers for the new CM objects.
Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
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Add EArchCommonObjSystemInfo to ArchCommonNameSpaceObjects.h and a
corresponding parser entry in ConfigurationManagerObjectParser.c.
Signed-off-by: Girish Mahadevan <gmahadevan@nvidia.com>
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Add support for generating SMBIOS Type 37 Memory Channel structures from
Configuration Manager data.
Introduce the Memory Channel CM object and the associated Memory Channel
Device CM object. The channel object describes the Type 37 fixed fields,
including channel type, maximum channel load, memory device count, and the
token for the device-list object. The device-list object describes each
memory device attached to the channel using a device load and a Type 17
Memory Device CM token.
Add parser entries for both CM objects and register the Type 37 generator in
the DynamicTablesPkg DSC so it is available through the SMBIOS table factory.
The Type 37 generator builds one SMBIOS record per Memory Channel CM object.
For each channel, it retrieves the referenced Memory Channel Device list,
validates the channel type, maximum channel load, device count, device load,
and device tokens, resolves each referenced Type 17 CM token to an SMBIOS
handle, and emits the variable-length MemoryDevice array in the Type 37
record.
This allows platforms to describe memory channels and link them to generated
Type 17 Memory Device records through CM tokens instead of hard-coded SMBIOS
handles.
Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
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Add an SMBIOS Type 20 generator for Memory Device Mapped Address
structures.
The generator builds one Type 20 table per Memory Device Mapped Address
CM object, validates the address range, encodes extended addresses when
the 32-bit address fields cannot represent the range, and maps optional
Type 17 and Type 19 CM object references to SMBIOS handles. If either
reference token is CM_NULL_TOKEN, the corresponding SMBIOS handle is set
to SMBIOS_HANDLE_INVALID.
Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
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Add a Configuration Manager object and parser for SMBIOS Type 23
System Reset information.
Add a Type 23 SMBIOS generator that creates the System Reset structure
from the System Reset CM object. The generator expects a single CM
object, fills the system reset capabilities and watchdog reset fields,
and registers the generated table with the SMBIOS table factory.
Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
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Add a Configuration Manager object and parser for SMBIOS Type 29
Electrical Current Probe information.
Add a Type 29 SMBIOS generator that creates one Electrical Current Probe
structure for each Electrical Current Probe CM object. The generator
validates the probe location and status fields, publishes the optional
description string, and registers the generated table with the SMBIOS
table factory.
Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
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Add a Configuration Manager object and parser for SMBIOS Type 26
Voltage Probe information.
Add a Type 26 SMBIOS generator that creates one Voltage Probe
structure for each Voltage Probe CM object. The generator validates
the probe location and status fields, publishes the optional
description string, and registers the generated table with the
SMBIOS table factory.
Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
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Introduce a CM_ARCH_COMMON_TEMPERATURE_PROBE_INFO object to describe
temperature probes provided by the platform. The generator creates one
SMBIOS Type 28 record for each temperature probe object and populates
the description, location/status, probe limits, resolution, tolerance,
accuracy, OEM-defined data, and nominal value.
Add the CM object parser entry and wire the generator into the
DynamicTablesPkg build.
Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
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Introduce a CM_ARCH_COMMON_COOLING_DEVICE_INFO object to describe
cooling devices provided by the platform. The generator creates one
SMBIOS Type 27 record for each cooling device object and populates the
device type/status, cooling unit group, OEM-defined data, nominal speed,
and optional description string.
The temperature probe handle is set to 0xFFFF for now because SMBIOS
Type 28 Temperature Probe generation is not currently available. Reject
non-null temperature probe tokens until Type 28 handle resolution can be
added.
Add the CM object parser entry and wire the generator into the
DynamicTablesPkg build.
Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
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CmArmDmc620PmuRegInfoParser only parses the interrupt field
without parsing the interrupt flags. Fix it.
Also make CmArmCmn600InfoParser use the common interrupt
parser instead of separately printing the interrupt number
and flag.
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
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Dmc620 have been added at an incorrect index in the
ArmNamespaceObjectParser array. Fix the order.
Also, rename:
- CmArmObjDmc620PmuSocketInfoParser
to:
- CmArmDmc620PmuSocketInfoParser
to follow the other conventional names.
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
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The following objects are missing some fields in the
CmObjParser:
- CM_ARCH_COMMON_PROC_HIERARCHY_INFO
- CM_ARCH_COMMON_CACHE_INFO
Add them.
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
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Add EArchCommonObjMemoryArrayMappedAddress to ArchCommonNameSpaceObjects.h
and a corresponding parser entry in ConfigurationManagerObjectParser.c.
Signed-off-by: Girish Mahadevan <gmahadevan@nvidia.com>
Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
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Add EArchCommonObjMemoryDeviceInfo to ArchCommonNameSpaceObjects.h
and a corresponding parser entry in ConfigurationManagerObjectParser.c.
Signed-off-by: Girish Mahadevan <gmahadevan@nvidia.com>
Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
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Add EArchCommonObjPhysicalMemoryArray to ArchCommonNameSpaceObjects.h
and a corresponding parser entry in ConfigurationManagerObjectParser.c.
Signed-off-by: Girish Mahadevan <gmahadevan@nvidia.com>
Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
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Add EArchCommonObjPlatformFwInfo to ArchCommonNameSpaceObjects.h and a
corresponding parser entry in ConfigurationManagerObjectParser.c.
Signed-off-by: Girish Mahadevan <gmahadevan@nvidia.com>
Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
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Add an ACPI Error Injection (EINJ) table generator that uses the
Configuration Manager to obtain the platform error-injection
instruction entries.
Ref: ACPI Specification, Section 18.6 (Error Injection—EINJ table).
Co-authored-by: Varshit Pandya <varshit.pandya@arm.com>
Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
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This is preparation patch to add HEST table generator in
DyanmicTablePkg.
Add common objects for common error sources information:
- IA-32 Architecture Machine Check Exception.
- IA-32 Architecture Corrected Machine Check.
- IA-32 Architecture Non-Maskable Interrupt.
- IA-32 Architecture Deferred Machine Check.
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
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This is preparation patch to add HEST table generator in
DyanmicTablePkg.
Add common objects for common error sources information:
- PCI Express Root Port AER Structure
- PCI Express Device AER Structure
- PCI Express/PCI-X Bridge AER Structure
- Generic Hardware Error Source
- Generic Hardware Error Source version 2
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
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Replace traditional `#ifndef`/`#define`/`#endif` include guards with
`#pragma` once.
`#pragma once` is a widely supported preprocessor directive that
prevents header files from being included multiple times. It is
supported by all toolchains used to build edk2: GCC, Clang/LLVM, and
MSVC.
Compared to macro-based include guards, `#pragma once`:
- Eliminates the risk of macro name collisions or copy/paste errors
where two headers inadvertently use the same guard macro.
- Eliminate inconsistency in the way include guard macros are named
(e.g., some files use `__FILE_H__`, others use `FILE_H_`, etc.).
- Reduces boilerplate (three lines replaced by one).
- Avoids polluting the macro namespace with guard symbols.
- Can improve build times as the preprocessor can skip re-opening the
file entirely, rather than re-reading it to find the matching
`#endif` ("multiple-include optimization").
- Note that some compilers may already optimize traditional include
guards, by recognzining the idiomatic pattern.
This change is made acknowledging that overall portability of the
code will technically be reduced, as `#pragma once` is not part of the
C/C++ standards.
However, this is considered acceptable given:
1. edk2 already defines a subset of supported compilers in
BaseTools/Conf/tools_def.template, all of which have supported
`#pragma once` for over two decades.
2. There have been concerns raised to the project about inconsistent
include guard naming and potential macro collisions.
Approximate compiler support dates:
- MSVC: Supported since Visual C++ 4.2 (1996)
- GCC: Supported since 3.4 (2004)
(http://gnu.ist.utl.pt/software/gcc/gcc-3.4/changes.html)
- Clang (LLVM based): Since initial release in 2007
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
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The Generic ACPI for Arm Components 1.2 Platform Design Document [1],
section 2.6.1.2 "ASL reference code for the DMC620 PMU" provides
information to describe the Arm Corelink DMC620 Dynamic Memory
Controller's Performance Monitoring Unit (PMU) block using an ASL
definition block table.
Add support for a table generator for the DMC620 PMU block. The table
generator uses the Configuration Manager protocol to obtain the
following information.
- Number of sockets on the platform
- DMC620 devices per socket
After obtaining the socket based topology, information is obtained on
individual DMC620 devices. This includes
- PMU register base address and length
- Information on the associated PMU interrupt
The table generator uses the Dynamic AML CodeGen API's for generating
the table from the information obtained through the Configuration
Manager protocol.
[1] - https://developer.arm.com/documentation/den0093/1-2eac1/
Signed-off-by: Sughosh Ganu <sughosh.ganu@arm.com>
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Add support for parsing RISC-V-specific structures in TableHelperLib.
These parsers assist in interpreting and processing Configuration
Manager (CM) objects related to RISC-V hardware components.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
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Add the missing parser for EArchCommonObjTpm2DeviceInfo.
This missing parser causing assert for EArchCommonObjMcfgPciConfigSpaceInfo
and EArchCommonObjPciRootPortInfo parser.
Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
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Adds RootPortInfoToken to PCIe config space object to
support addition of root port devices in PCIE SSDT.
Updates the ConfigurationManagerObjectParser to include the new token.
Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
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Introduce new architecture common namespace object
for PCIe root ports in the DynamicTables package.
This object holds information:
- PCIe root port address in device and function format
- Reference token information to the PCIe routing table object
- Slot number information for the root port
Also updates ConfigurationManagerObjectParser to parse
the new object and populate the relevant fields.
Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
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Introduce EArchCommonObjMcfgPciConfigSpaceInfo as an alias for
EArchCommonObjPciConfigSpaceInfo.
The CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO object is utilized by both
the MCFG and ACPI SSDT PCIE generators. Assigning a unique configuration
object ID ensures the platform configuration driver supplies the correct data.
Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
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Introduce optional configuration objects to specify interrupt and terminal types.
When the platform supplies this information,
the SPCR table is updated to reflect the provided values.
If the interrupt type is 8259,
the corresponding IRQ number is set in the SPCR table.
Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
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