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BuildFadtTable() adds platform-provided fixed-feature flags before
calling FadtArchUpdate(). The Arm and RISC-V implementations assign
Fadt->Flags, discarding the flags already added by the platform.
Use bitwise OR assignment to add architecture defaults without
overwriting the existing flags. Leave the generation order, validation
masks, ACPI revision handling, and architecture defaults unchanged.
Signed-off-by: Djordje Nedic <djordje.nedic@nextsilicon.com>
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AmlCreateRootNode() calls AmlDeleteRootNode() when SDT header
allocation fails. However, AmlDeleteRootNode() rejects a NULL header
and returns without freeing the root node, leaking the node allocation.
Allow AmlDeleteRootNode() to handle a NULL SDT header and always free
the root node.
Signed-off-by: Amrathesh <amrathesh@arm.com>
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AmlCreateDataNode() calls AmlDeleteDataNode() when buffer allocation
fails. However, AmlDeleteDataNode() rejects a NULL buffer and returns
without freeing the data node, leaking the node allocation.
Allow AmlDeleteDataNode() to handle a NULL buffer and always free the
data node.
Signed-off-by: Amrathesh <amrathesh@arm.com>
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AmlSetFixedArgument() accepts an index equal to the fixed argument count.
The count is an exclusive upper bound, so this permits an out-of-bounds
write to the FixedArgs array.
Require the index to be strictly less than the fixed argument count.
Signed-off-by: Amrathesh <amrathesh@arm.com>
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AmlSerializeTree uses a reversed buffer size comparison. As a result, it
returns success without serializing when the buffer is larger than needed
and attempts serialization when the buffer is too small.
Return EFI_BUFFER_TOO_SMALL when Buffer is NULL or the supplied buffer is
too small, and always report the required size. Update
AmlSerializeDefinitionBlock to handle the expected size query status.
Signed-off-by: Amrathesh <amrathesh@arm.com>
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Signed-off-by: Girish Mahadevan <gmahadevan@nvidia.com>
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Signed-off-by: Girish Mahadevan <gmahadevan@nvidia.com>
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Add a common Error Record Serialization Table (ERST) generator based on
the ACPI 6.6 definition. Introduce an architecture-common Configuration
Manager object to provide serialization instruction entries.
Validate actions, instructions, flags, register masks, action grouping,
and GOTO targets before generating the table.
Signed-off-by: Amrathesh <amrathesh@arm.com>
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Add a common Boot Error Record Table (BERT) generator based on the
ACPI 6.6 definition. Introduce an architecture-common Configuration
Manager object that provides the boot error region address and length.
Signed-off-by: Amrathesh <amrathesh@arm.com>
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Signed-off-by: Girish Mahadevan <gmahadevan@nvidia.com>
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Signed-off-by: Girish Mahadevan <gmahadevan@nvidia.com>
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For GicV5 ITS, it should be iterated with GicItsV5Info not GicItsInfo
in SratGenerator. Fix wrong iteration.
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
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Up to 16 IWB devices can currently be created dynamically. However,
the device name is derived from GicIwbId, which causes problems when
GicIwbId is greater than 16.
Use a separate index to generate the device name instead.
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
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Several fields are missing from the GICv5 Configuration Manager object
parsers, including those used for SRAT.
Add the missing fields.
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
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FdtResolveInterrupt() might be called on a node with an absent
"interrupts" property. In such case, the function should:
- not assert
- return EFI_NOT_FOUND
This ASSERT is triggered when running ArmVirtKvmtool,
when searching for a GSIV maintenance interrupt.
Fixes: b377584b344a ("DynamicTablesPkg/HwInfoParser:
Add FdtResolveInterrupt()")
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
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GICD information is not a mandatory in the platform where use
the GicV5 interrupt controller.
Therefore, make GICD information as optional one.
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
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To support SPCR with GicV5, check GiCv5 SPI IRQ ranges too.
And cleanup for ifdef for ARM specific validation with the Arch
specific function to validate serial port information.
Signed-off-by: Sarah Walker <Sarah.Walker2@arm.com>
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Generate GICv5 related information in IORT table.
Continuous-integration-options: PatchCheck.ignore-multi-package
Co-Developed-by: Yeoreum Yun <yeoreum.yun@arm.com>
Signed-off-by: Sarah Walker <Sarah.Walker2@arm.com>
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Since the IORT specification version E.g[0], Number of ITS node
(a.k.a ITS Group node) must be "1".
To ensure compliance with the specification,
add a sanity check for the number of ITS Group nodes.
Link: https://developer.arm.com/documentation/den0049/latest [0]
Continuous-integration-options: PatchCheck.ignore-multi-package
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
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Generate GICv5 related information in SRAT table.
Signed-off-by: Sarah Walker <Sarah.Walker2@arm.com>
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Generate GICv5 related information in MADT table.
Signed-off-by: Sarah Walker <Sarah.Walker2@arm.com>
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Signed-off-by: Girish Mahadevan <gmahadevan@nvidia.com>
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Signed-off-by: Girish Mahadevan <gmahadevan@nvidia.com>
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Signed-off-by: Girish Mahadevan <gmahadevan@nvidia.com>
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Signed-off-by: Girish Mahadevan <gmahadevan@nvidia.com>
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The following IRQ helper macros are now unused:
- GET_DT_REG_ADDRESS_OFFSET()
- GET_DT_REG_SIZE_OFFSET()
Remove them.
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
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The Devicetree Specification [1] defines the "ranges" property.
"""
The ranges property provides a means of defining a mapping or
translation between the address space of the bus (the child
address space) and the address space of the bus node’s parent
(the parent address space).
"""
Add a FdtGetTranslatedReg() function, reading the "reg" property
of a node and translating the base address through the "ranges"
properties present in the node hierarchy.
Make use of FdtGetTranslatedReg() wherever relevant.
This allows to handle the presence of "ranges" property in
a node hierarchy by default.
[1] Spec. v0.4, s2.3.8 ranges
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
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Add a FdtGetReg() helper to fetch the "reg" property of a node.
Use the newly introduce helper wherever relevant.
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
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The Devicetree Specification [1] defines the concept of interrupt
mapping, interrupt domain, interrupt nexus and interrupt controller.
An interrupt property might need to be translated through an
interrupt nexus to obtain the interrupt type, id, flags.
Add a FdtResolveInterrupt() function, resolving an interrupt property
through interrupt nexuses until reaching the interrupt-controller
node.
Make use of FdtResolveInterrupt() wherever relevant.
This allows to handle the presence of interrupt nexus
by default.
[1] Spec. v0.4, s2.4 Interrupts and Interrupt Mapping
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
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Add a Size parameter to:
- FdtGetInterruptId()
- FdtGetInterruptFlags()
This allows to check the size of the interrupt data to parse
inside the later functions.
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
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FdtGetInterruptCellsInfo() expects to receive an interrupt
controller node. However, a common use-case is to get the
"#interrupt-cells" of a non interrupt-controller node in order
to decode an "interrupts" property.
Add a "SearchInHierarchy" parameter to
FdtGetInterruptCellsInfo() to conditionnaly relax the
function and either get the "#interrupt-cells" property:
- from the input node
- from the hierachy of the input node.
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
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A FDT interrupt nexus defines an "interrupt-map" property.
The property is an array of 5 columns as:
- child unit address
- child interrupt specifier
- interrupt-parent (phandle on 1 cell)
- parent unit address
- parent interrupt specifier
It is difficult to iterate over the lines of the
"interrupt-map" array. To determine the location of each
property in the interrupt-map, the size of the child unit
address and interrupt specifier must be fetched. The
interrupt-parent cells then allows to fetch the size of the
parent unit address and interrupt specifier.
Create a FdtGetInterruptMap() function allowing to fetch
all the properties of an interrupt-map entry.
Use the function to simplify the PCI config space parser.
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
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An interrupt-controller node might have interrupts itself.
In such case, the interrupt parent of the interrupt-controller
must be found.
If no interrupt parent is found, fallback to the input node
(if the node is an interrupt-controller itself).
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
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The Devicetree Specification [1] defines the concept of interrupt
mapping, interrupt domain, interrupt nexus and interrupt controller.
The "interrupt-controller" property defines a node as an interrupt
controller. The "interrupt-map" property defines a node as an
interrupt nexus. Both node types are defined as the root of an
interrupt domain.
A GIC (Generic Interrupt Controller) is an interrupt controller. The
GIC version should be fetched to the matching device tree node. A
node defining an interrupt domain might not necessarily be an
interrupt controller and contain this information.
Introduce 2 functions:
- FdtGetIntControllerNode()
- FdtGetIntDomainNode()`
to distinguish the 2 concepts.
As the presence of interrupt nexus/domains is currently not supported,
replace FdtGetIntcParentNode() calls with FdtGetIntControllerNode().
The distinction will be useful in following patches.
Also, update the detection of an interrupt domain to the presence
of one of these properties:
- interrupt-controller
- interrupt-map
instead of relying on the presence of the #interrupt-cells property,
which is not a guarantee.
[1] Spec. v0.4, s2.4 Interrupts and Interrupt Mapping
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
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Rework FdtGetIntcNode() to prepare for following patches
which will allow to make the distinction between
interrupt-controller nodes and interrupt nexus nodes.
Add the following functions:
- FdtGetIntcParentNode()
- FdtIsIntcDomainNode()
No functional change.
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
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The interrupt parent of a node is:
- the node pointed by the "interrupt-parent" property
if the property is present
- the direct parent otherwise.
FdtGetIntcParentNode() doesn't aim to find the next
parent node in the interrupt hierarchy. It aims to find
the interrupt-controller node upon which the input node
depends. This interrupt-controller node might be multiple
nodes up in the device tree hierarchy.
Thus, rename FdtGetIntcParentNode() to FdtGetIntcNode()
to make the function name less ambiguous and prepare for
the addition of a function which gets the next parent node
in an interrupt hierarchy.
No functional change.
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
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Add a ReadFdtCells64() helper function, allowing to
read a value spanning on 1 or 2 UINT32 FDT cells.
Use ReadFdtCells64() wherever relevant.
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
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Extend the CMN Configuration Manager object with an implementation type
and optional root-node region length.
Map the implementation type to the ACPI hardware IDs for CMN-600,
CMN-650, CMN-700 and CMN-S3. Apply CMN-600-specific address restrictions
only when the CMN-600 implementation type is selected.
Rename the CMN-600 generator, identifiers and files to reflect support
for multiple CMN implementations.
Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
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Add AmlCodeGenEqual() to create an AML LEqual expression from two
supplied operands.
Use the existing AML_METHOD_PARAM representation for integer, method
argument, and local variable operands. The generated equality expression
can be used as a predicate by control-flow objects.
Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
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Add AmlCodeGenIf() to create an AML If object from a supplied
predicate node.
The API takes ownership of the predicate and returns an If node to
which executable statements can subsequently be appended.
Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
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AmlSetFixedArgument() attaches NewNode to an AML object but does not
currently verify that the node is detached. Passing an already attached
node could leave the AML tree in an inconsistent state.
Require non-NULL argument nodes to be detached before attaching them.
Continue accepting NULL because callers use it to clear a fixed
argument.
Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
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Use AmlComputePkgLength() when calculating the package lengths for
Device, ThermalZone, and Scope objects.
The package-length encoding width is included in the encoded length and
can itself increase when that width is added. AmlComputePkgLength()
handles this boundary condition correctly.
Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
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Add AmlCodeGenStoreToName() to create an AML Store operation with a
typed source operand and a named target.
Support integer, method argument and local variable sources using the
AML_METHOD_PARAM representation. Append the generated Store node to an
optional parent object.
Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
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Add AmlCodeGenFieldElemNamed() to create a named element within an AML
Field list.
The API validates the supplied NameSeg and field length, encodes the
length using the AML FieldPkgLen format, and appends the resulting
NamedField node to its parent Field object.
Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
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Add AmlCodeGenFieldElemReserved() to create an AML ReservedField
element and append it to a Field list.
The API accepts the reserved range length in bits and validates that
the parent supports a Field list. ReservedField elements describe
unnamed gaps in Field declarations and can be used when translating
ASL Offset() declarations.
Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
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Validate that the package length passed to AmlCreateObjectNode() fits
within the 28-bit limit defined by the AML package-length encoding.
Perform the validation centrally so that it applies consistently to all
callers.
Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
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Add AmlCodeGenField() to create an empty AML Field object associated
with an OperationRegion.
Expose access type, lock rule, and update rule through typed public
enumerations and encode them in the Field flags byte. The generated
Field node can be attached directly to a parent or returned so that
field elements can subsequently be appended.
For example, the API can generate:
Field (REG0, DWordAcc, NoLock, Preserve)
{
}
Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
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Add AmlCodeGenOperationRegion() to create an AML OperationRegion
object from a region name, address space, integer offset, and integer
length.
The API creates the OperationRegion object and populates its four fixed
AML operands:
- RegionName
- RegionSpace
- RegionOffset
- RegionLength
RegionOffset and RegionLength are encoded using the smallest suitable
AML integer representation. The generated node can either be attached
directly to a supplied parent or returned to the caller for later use.
For example, the API can generate an object equivalent to:
OperationRegion (
REG0,
SystemMemory,
RegionOffset,
RegionLength
)
This provides generators with a reusable way to describe register
regions without relying on a precompiled ASL template.
Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
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Allow AmlCodeGenNotifyNode() to attach a Notify object to any suitable
parent node.
This enables Notify objects to be generated within nested AML scopes,
for example:
Method (_EVT, 1, Serialized)
{
If (LEqual (Arg0, EventId))
{
Notify (\_SB.RAS0, Value)
}
}
Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
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Make AmlCodeGenNotify() public and declare it in AmlLib.h. Add the new
API to the CodeGen documentation group.
Callers currently cannot append an individual Notify operation while
incrementally constructing a method body.
For example, this enables generators to construct _EVT methods
containing conditional register writes and device notifications.
Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
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