starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2025-02-03	clk: renesas: r8a779h0: Add VSPX clock	Niklas Söderlund	1	-0/+1
2025-02-03	clk: renesas: r8a779h0: Add FCPVX clock	Niklas Söderlund	1	-0/+1
2025-02-03	clk: renesas: r8a779h0: Add ISP core clocks	Niklas Söderlund	1	-0/+1
2024-12-10	clk: renesas: r8a779h0: Add display clocks	Tomi Valkeinen	1	-0/+4
2024-10-14	clk: renesas: r8a779h0: Drop CLK_PLL2_DIV2 to clarify ZCn clocks	Geert Uytterhoeven	1	-6/+4
2024-08-20	clk: renesas: r8a779h0: Add CANFD clock	Cong Dang	1	-0/+1
2024-08-02	clk: renesas: r8a779h0: Add PWM clock	Cong Dang	1	-0/+1
2024-07-30	clk: renesas: rcar-gen4: Remove unused default PLL2/3/4/6 configs	Geert Uytterhoeven	1	-5/+5
2024-07-30	clk: renesas: r8a779h0: Model PLL1/2/3/4/6 as fractional PLLs	Geert Uytterhoeven	1	-5/+5
2024-07-30	clk: renesas: rcar-gen4: Use defines for common CPG registers	Geert Uytterhoeven	1	-6/+6
2024-07-30	clk: renesas: r8a779h0: Initial clock descriptions should be __initconst	Geert Uytterhoeven	1	-3/+3
2024-07-30	clk: renesas: r8a779h0: Add PCIe clock	Yoshihiro Shimoda	1	-0/+1
2024-06-27	clk: renesas: r8a779h0: Add Audio clocks	Kuninori Morimoto	1	-0/+2
2024-06-24	clk: renesas: r8a779h0: Fix PLL2/PLL4 multipliers in comments	Geert Uytterhoeven	1	-3/+3
2024-06-11	clk: renesas: r8a779h0: Add VIN clocks	Niklas Söderlund	1	-0/+16
2024-06-03	clk: renesas: r8a779h0: Add CSI-2 clocks	Niklas Söderlund	1	-0/+2
2024-06-03	clk: renesas: r8a779h0: Add ISPCS clocks	Niklas Söderlund	1	-0/+2
2024-04-23	clk: renesas: r8a779h0: Add INTC-EX clock	Cong Dang	1	-0/+1
2024-04-23	clk: renesas: r8a779h0: Add MSIOF clocks	Cong Dang	1	-0/+6
2024-04-08	clk: renesas: r8a779h0: Add timer clocks	Thanh Quan	1	-0/+9
2024-04-02	clk: renesas: r8a779h0: Add SCIF clocks	Geert Uytterhoeven	1	-0/+4
2024-03-26	clk: renesas: r8a779h0: Add thermal clock	Geert Uytterhoeven	1	-0/+1
2024-02-20	clk: renesas: r8a779h0: Add RPC-IF clock	Cong Dang	1	-0/+1
2024-02-20	clk: renesas: r8a779h0: Add SYS-DMAC clocks	Cong Dang	1	-0/+2
2024-02-20	clk: renesas: r8a779h0: Add SDHI clock	Cong Dang	1	-0/+1
2024-02-20	clk: renesas: r8a779h0: Add EtherAVB clocks	Cong Dang	1	-0/+3
2024-02-06	clk: renesas: r8a779h0: Add I2C clocks	Cong Dang	1	-0/+4
2024-02-06	clk: renesas: r8a779h0: Add watchdog clock	Cong Dang	1	-0/+1
2024-02-06	clk: renesas: r8a779h0: Add PFC/GPIO clocks	Cong Dang	1	-0/+3
2024-01-31	clk: renesas: cpg-mssr: Add support for R-Car V4M	Cong Dang	1	-0/+241