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2021-12-07MdePkg: Apply uncrustify changesMichael Kubacki4-50/+44
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the MdePkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2019-04-09MdePkg: Replace BSD License with BSD+Patent LicenseMichael D Kinney9-63/+9
https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-11-08MdePkg/BaseSynchronizationLib: Fix InternalSync[De|In]crementRuiyu Ni1-2/+2
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1303 Today's code generates assembly code as below for InternalSyncIncrement: __asm__ __volatile__ ( "movl $1, %%eax \n\t" "lock \n\t" "xadd %%eax, %1 \n\t" "inc %%eax \n\t" : "=a" (Result), // %0 "+m" (*Value) // %1 : // no inputs that aren't also outputs : "memory", "cc" ); 0: 55 pushl %ebp 1: 89 e5 movl %esp, %ebp 3: 8b 45 08 movl 8(%ebp), %eax 6: b8 01 00 00 00 movl $1, %eax b: f0 lock c: 0f c1 00 xaddl %eax, _InternalSyncIncrement(%eax) f: 40 incl %eax 10: 5d popl %ebp 11: c3 retl Line #3 and Line #6 both use EAX as destination register. Line #c uses EAX and (EAX). The output operand "=a" tells GCC that EAX is used for output. But GCC only assumes that EAX will be used in the very last instruction. Per GCC document, "Use the '&' constraint modifier on all output operands that must not overlap an input. Otherwise, GCC may allocate the output operand in the same register as an unrelated input operand, on the assumption that the assembler code consumes its inputs before producing outputs. This assumption may be false if the assembler code actually consists of more than one instruction." "=&a" should be used to tell GCC not use EAX before the assembly. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Philippe Mathieu-Daudé <philmd@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Laszlo Ersek <lersek@redhat.com> Suggested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Fixes: 8a94eb9283fa09a30f5f06f0c12cf0ee4e14fbcf Fixes: 17634d026f968c404b039a8d8431b6389dd396ea
2018-10-17MdePkg/BaseSynchronizationLib GCC: fix X64 InternalSyncCompareExchange64()Laszlo Ersek1-6/+4
(This patch is identical to the X64 half of the last one, except for the InternalSyncCompareExchange32() -> InternalSyncCompareExchange64() and "cmpxchgl" -> "cmpxchgq" replacements.) The CMPXCHG instruction has the following operands: - AX (implicit, CompareValue): input and output - destination operand (*Value): input and output - source operand (ExchangeValue): input The X64 version of InternalSyncCompareExchange64() attempts to mark both CompareValue and (*Value) as input/output, but it doesn't use the appropriate constraints for either operand. Fix these issues. Furthermore, prefer the short "+" constraint for I/O operands over the <output-operand-number> constraint that can be applied to the input instances of I/O operands. Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1208 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-10-17MdePkg/BaseSynchronizationLib GCC: fix InternalSyncCompareExchange32()Laszlo Ersek1-6/+4
(This patch is identical to the last one, except for the InternalSyncCompareExchange16() -> InternalSyncCompareExchange32() and "cmpxchgw" -> "cmpxchgl" replacements.) The CMPXCHG instruction has the following operands: - AX (implicit, CompareValue): input and output - destination operand (*Value): input and output - source operand (ExchangeValue): input The IA32 version of InternalSyncCompareExchange32() correctly marks CompareValue as input/output, but it marks (*Value) only as input. The X64 version of InternalSyncCompareExchange32() attempts to mark both CompareValue and (*Value) as input/output, but it doesn't use the appropriate constraints for either operand. Fix these issues. Furthermore, prefer the short "+" constraint for I/O operands over the <output-operand-number> constraint that can be applied to the input instances of I/O operands. Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1208 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-10-17MdePkg/BaseSynchronizationLib GCC: fix InternalSyncCompareExchange16()Laszlo Ersek1-6/+4
The CMPXCHG instruction has the following operands: - AX (implicit, CompareValue): input and output - destination operand (*Value): input and output - source operand (ExchangeValue): input The IA32 version of InternalSyncCompareExchange16() correctly marks CompareValue as input/output, but it marks (*Value) only as input. The X64 version of InternalSyncCompareExchange16() attempts to mark both CompareValue and (*Value) as input/output, but it doesn't use the appropriate constraints for either operand. Fix these issues. Furthermore, prefer the short "+" constraint for I/O operands over the <output-operand-number> constraint that can be applied to the input instances of I/O operands. Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1208 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-10-17MdePkg/BaseSynchronizationLib GCC: fix whitespace and commentsLaszlo Ersek1-30/+23
The "GccInline.c" files have some inconsistent whitespace, and missing (or incorrect) operand comments. Fix and unify them. This patch doesn't change behavior. Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1208 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-09-26MdePkg/BaseSynchronizationLib: fix XADD operands in GCC IA32/X64 assemblyLaszlo Ersek1-6/+6
Currently, "gcc-4.8.5-28.el7_5.1.x86_64" generates the following code for me, from the XADD inline assembly added to "X64/GccInline.c" in commit 17634d026f96: > 0000000000004383 <InternalSyncIncrement>: > UINT32 > EFIAPI > InternalSyncIncrement ( > IN volatile UINT32 *Value > ) > { > 4383: 55 push %rbp > 4384: 48 89 e5 mov %rsp,%rbp > 4387: 48 83 ec 10 sub $0x10,%rsp > 438b: 48 89 4d 10 mov %rcx,0x10(%rbp) > UINT32 Result; > > __asm__ __volatile__ ( > 438f: 48 8b 55 10 mov 0x10(%rbp),%rdx > 4393: 48 8b 45 10 mov 0x10(%rbp),%rax > 4397: b8 01 00 00 00 mov $0x1,%eax > 439c: f0 0f c1 00 lock xadd %eax,(%rax) > 43a0: ff c0 inc %eax > 43a2: 89 45 fc mov %eax,-0x4(%rbp) > : "m" (*Value) // %2 > : "memory", > "cc" > ); > > return Result; > 43a5: 8b 45 fc mov -0x4(%rbp),%eax > } > 43a8: c9 leaveq > 43a9: c3 retq > The MOV $0X1,%EAX instruction corrupts the address of Value in %RAX before we reach the XADD instruction. In fact, it makes no sense for XADD to use %EAX as source operand and (%RAX) as destination operand at the same time. The XADD instruction's destination operand is a read-write operand. The GCC documentation states: > The ordinary output operands must be write-only; GCC will assume that > the values in these operands before the instruction are dead and need > not be generated. Extended asm supports input-output or read-write > operands. Use the constraint character `+' to indicate such an operand > and list it with the output operands. You should only use read-write > operands when the constraints for the operand (or the operand in which > only some of the bits are to be changed) allow a register. (The above is intentionally quoted from the oldest GCC release that edk2 supports, namely gcc-4.4: <https://gcc.gnu.org/onlinedocs/gcc-4.4.7/gcc/Extended-Asm.html>.) Fix the operand list accordingly. With the patch applied, I get: > 0000000000004383 <InternalSyncIncrement>: > UINT32 > EFIAPI > InternalSyncIncrement ( > IN volatile UINT32 *Value > ) > { > 4383: 55 push %rbp > 4384: 48 89 e5 mov %rsp,%rbp > 4387: 48 83 ec 10 sub $0x10,%rsp > 438b: 48 89 4d 10 mov %rcx,0x10(%rbp) > UINT32 Result; > > __asm__ __volatile__ ( > 438f: 48 8b 55 10 mov 0x10(%rbp),%rdx > 4393: 48 8b 45 10 mov 0x10(%rbp),%rax > 4397: b8 01 00 00 00 mov $0x1,%eax > 439c: f0 0f c1 02 lock xadd %eax,(%rdx) > 43a0: ff c0 inc %eax > 43a2: 89 45 fc mov %eax,-0x4(%rbp) > : // no inputs that aren't also outputs > : "memory", > "cc" > ); > > return Result; > 43a5: 8b 45 fc mov -0x4(%rbp),%eax > } > 43a8: c9 leaveq > 43a9: c3 retq Note that some other bugs remain in "BaseSynchronizationLib/*/GccInline.c"; those should be addressed later, under <https://bugzilla.tianocore.org/show_bug.cgi?id=1208>. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1207 Fixes: 17634d026f968c404b039a8d8431b6389dd396ea Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
2018-09-25MdePkg/SynchronizationLib: fix Interlocked[De|In]crement return valueRuiyu Ni5-108/+16
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1197 Today's InterlockedIncrement()/InterlockedDecrement() guarantees to perform atomic increment/decrement but doesn't guarantee the return value equals to the new value. The patch fixes the behavior to use "XADD" instruction to guarantee the return value equals to the new value. The patch calls intrinsic functions for MSVC tool chain, calls the NASM implementation for INTEL tool chain and calls GCC inline assembly implementation (GccInline.c) for GCC tool chain. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com>
2018-06-28MdePkg: Clean up source filesLiming Gao1-13/+13
1. Do not use tab characters 2. No trailing white space in one line 3. All files must end with CRLF Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com>
2018-06-07MdePkg: Remove X86 ASM and S filesLiming Gao5-202/+0
NASM has replaced ASM and S files. 1. Remove ASM from all modules. 2. Remove S files from the drivers only. 3. https://bugzilla.tianocore.org/show_bug.cgi?id=881 After NASM is updated, S files can be removed from Library. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
2016-11-18MdePkg/BaseSynchronizationLib: Fix function names in function headersMichael Kinney10-10/+10
Some of the function names in function header comment blocks in assembly files do not match the symbol name in the assembly sources. Update function header comment blocks to match symbol name. Cc: Liming Gao <liming.gao@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Andrew Fish <afish@apple.com> Cc: Jeff Fan <jeff.fan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-11-18MdePkg/BaseSynchronizationLib: Add volatile Interlocked*() APIsMichael Kinney15-32/+32
The SpinLock functions in the SynchronicationLib use volatile parameters to keep compiler from optimizing these functions too much. The volatile keyword is missing from the Interlocked*() functions in this same library instance. Update the library instance to consistently use volatile on all functions in the SynchronizationLib class. Cc: Liming Gao <liming.gao@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Andrew Fish <afish@apple.com> Cc: Jeff Fan <jeff.fan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-06-28MdePkg BaseSynchronizationLib: Convert X64/InterlockedIncrement.asm to NASMJordan Justen1-0/+39
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert X64/InterlockedIncrement.asm to X64/InterlockedIncrement.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseSynchronizationLib: Convert X64/InterlockedDecrement.asm to NASMJordan Justen1-0/+39
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert X64/InterlockedDecrement.asm to X64/InterlockedDecrement.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseSynchronizationLib: Convert X64/InterlockedCompareExchange16.asm ↵Jordan Justen1-0/+42
to NASM The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert X64/InterlockedCompareExchange16.asm to X64/InterlockedCompareExchange16.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseSynchronizationLib: Convert X64/InterlockedCompareExchange32.asm ↵Jordan Justen1-0/+41
to NASM The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert X64/InterlockedCompareExchange32.asm to X64/InterlockedCompareExchange32.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseSynchronizationLib: Convert X64/InterlockedCompareExchange64.asm ↵Jordan Justen1-0/+41
to NASM The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert X64/InterlockedCompareExchange64.asm to X64/InterlockedCompareExchange64.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2015-03-05MdePkg: Convert non DOS format files to DOS formatHot Tian1-42/+42
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hot Tian <hot.tian@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17010 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-28MdePkg/BaseSynchronizationLib: Add InterlockedCompareExchange16Ard Biesheuvel3-0/+140
This implements the function InterlockedCompareExchange16 () for all architectures, using architecture and toolchain specific intrinsics or primitive assembler instructions. Contributed-under: TianoCore Contribution Agreement 1.0 Reviewed-by: Olivier Martin <olivier.martin@arm.com> Acked-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16966 6f19259b-4bc3-4df7-8a09-765794883524
2010-06-26Minor grammatical work--mostly adding periods. Items with ONLY period added ↵myronporter9-12/+12
did not have the heading date changed, but Items with content changes had heading copyright dates updated. Sending separately a list of files missing Doxygen @param and @return information. (PENDING) git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10604 6f19259b-4bc3-4df7-8a09-765794883524
2010-05-19Temporarily remove build-in __sync_val_compare_and_swap() in the ↵qhuang81-18/+2
implementation of sync functions. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10519 6f19259b-4bc3-4df7-8a09-765794883524
2010-05-18Update copyright formathhtian1-3/+3
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10506 6f19259b-4bc3-4df7-8a09-765794883524
2010-05-181. Restore the inline C implementation of GCC assembly files that was ↵qhuang85-147/+192
temporarily removed in Svn r10045. 2. Remove 139 GCC assembly files whose functionality have been covered in the inline C implementation. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10503 6f19259b-4bc3-4df7-8a09-765794883524
2010-04-23Update the copyright notice formathhtian12-24/+24
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10413 6f19259b-4bc3-4df7-8a09-765794883524
2010-02-23Temporarily remove the C implementation of some GCC assembly files in ↵qhuang81-192/+0
MdePkg. They are kept in repository and will be re-evaluate later. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10045 6f19259b-4bc3-4df7-8a09-765794883524
2009-08-25Fix file headersmdkinney1-1/+1
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9189 6f19259b-4bc3-4df7-8a09-765794883524
2009-08-21Add "/" after "lock" and another instruction to improve compatibility.qhuang84-9/+9
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9167 6f19259b-4bc3-4df7-8a09-765794883524
2009-08-19Update to make end-of-line consistent for all source files in MdePkg. There ↵qhuang81-192/+192
are no other updates besides that change. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9141 6f19259b-4bc3-4df7-8a09-765794883524
2009-08-19Add ARM supportmdkinney1-0/+192
Add C inline versions of the IA32 and X64 assembly functions. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9112 6f19259b-4bc3-4df7-8a09-765794883524
2009-08-11Remove all unnecessary .align directives in MdePkgqhuang81-2/+1
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9042 6f19259b-4bc3-4df7-8a09-765794883524
2009-05-201. Remove .extern from GCC assembly.xli244-4/+4
2. Define macro for .global/.globl in GCC assembly. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@8344 6f19259b-4bc3-4df7-8a09-765794883524
2009-01-30Split out Synchronization Library from Base Librarymdkinney12-0/+507
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7377 6f19259b-4bc3-4df7-8a09-765794883524
generated by cgit v1.2.3 (git 2.39.0) at 2026-09-29 01:27:38 +0300