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Update libfdt submodule to commit f48b965 of pylibfdt.
Repo: https://github.com/devicetree-org/pylibfdt
Commit: f48b965
This moves to dtc v1.7.2-24-gf4c53f4ebf78.
Signed-off-by: Vishal Oliyil Kunnil <vishalo@qti.qualcomm.com>
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Only ASCII and Latin-1 characters can be cast between CHAR8 and CHAR16
transparently, other characters in the UCS-2 set cannot be represented
at all.
So when handling the %s conversion while generating a narrow string,
replace characters outside of the Latin-1 range with a '?' character
instead of producing garbage output, which may truncate the output
string inadvertently if the UCS-2 low byte happens to equal \0.
When the input and output character widths are the same, the encoding
does not matter and the input can simply be copied to the output.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
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Point the strrchr and strtoul macros in LibFdtSupport.h at the new
AsciiStrRChr() and AsciiStrToUintn() BaseLib APIs instead of the
private fdt_strrchr()/fdt_strtoul() implementations. This removes
duplicated logic and picks up the overflow-detection already present
in the underlying AsciiStrHexToUintnS()/AsciiStrDecimalToUintnS()
conversion routines.
LibFdtWrapper.c is now empty of purpose and is removed, along with
its entry in BaseFdtLib.inf.
Signed-off-by: Vishal Oliyil Kunnil <vishalo@qti.qualcomm.com>
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Add AsciiStrToUintn() and AsciiStrToUint64() to BaseLib. These are
thin wrappers that dispatch to the existing AsciiStrHexToUintnS()/
AsciiStrDecimalToUintnS() (and UINT64 equivalents) based on Base,
which must be 0 (auto-detect via a "0x"/"0X" prefix), 10, or 16.
No new radix-parsing logic is introduced; the existing conversion
routines already cover the bases actually used in practice.
Signed-off-by: Vishal Oliyil Kunnil <vishalo@qti.qualcomm.com>
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Add AsciiIsSpace() to BaseLib, which checks whether an ASCII
character is a space character as defined by the ISO C isspace()
function. This will be used to implement AsciiStrToUintn() and
AsciiStrToUint64().
Signed-off-by: Vishal Oliyil Kunnil <vishalo@qti.qualcomm.com>
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Add AsciiStrRChr() to BaseLib, which returns the last occurrence of
a character in a Null-terminated ASCII string. This mirrors the
existing AsciiStrStr() API style and provides a reusable
implementation for consumers that currently hand-roll this logic.
Signed-off-by: Vishal Oliyil Kunnil <vishalo@qti.qualcomm.com>
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CompilerIntrinsicsLib is causing a #UD when used in IA32 mode.
This was tracked back to memcpy using size_t, which locally
defined in the file as __int64. When compiling for IA32 target,
this results in the memcpy interpreting 64 bits from the
calling convention instead of the 32 bits that were passed.
Update the local size_t defines to use UINTN. This matches
the functionality from CryptoPkg's Intrinsic functions.
Add CompilerIntrinsics to IA32/X64 component so it is complied
as part of CI.
Add size_t as ECC check exclusion to MdePkg.ci.yaml.
Signed-off-by: Aaron Pop <aaronpop@microsoft.com>
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This change fixes some ECC check failures around the usage of doxygen
keywords.
Signed-off-by: Kun Qin <kun.qin@microsoft.com>
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This change adds the support of reading CNTPCT_EL0 and ID_AA64ISAR0_EL1
through current BaseLib definition.
This paves way to allow the linkage of these functions needed on other
host based unit tests.
Signed-off-by: Kun Qin <kun.qin@microsoft.com>
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The existing UnitTestHostBaseLib has some source entries that are either
redundant or for unsupported architectures.
This change consolidated the redundant entries and removed the entries
for unsupported architectures.
Signed-off-by: Kun Qin <kun.qin@microsoft.com>
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This change adds a few preprocessors to build AArch64 host based unit
tests properly.
An AArch64 specific instance of `gUnitTestHostBaseLib` is created to
abstract the reference of arch specific special instructions.
Signed-off-by: Kun Qin <kuqin12@gmail.com>
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The implementation adds a toolchain-specific compiler barriers to
discourage reordering under aggressive optimization around memory
setting operations.
Signed-off-by: Kun Qin <kun.qin@microsoft.com>
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The allocated buffer NewStr should be checked if it's NULL to avoid
null pointer dereference.
Signed-off-by: Qihang Gao <gaoqihang@loongson.cn>
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The function DevPathToTextUsbWWID() allocates NewStr when the input
SerialNumber lacks a null terminator. However, this allocated memory
is never freed after use, resulting in a memory leak.
This patch adds the missing FreePool() for NewStr before the function
returns, ensuring that the allocated buffer is properly freed and
eliminating the potential leak.
Signed-off-by: Qihang Gao <gaoqihang@loongson.cn>
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Added LoongArch64 support. Currently, LoongArch64 doesn't supports TRNG,
it uses the `RDTIME` instruction and a xorshif64 alorithms to compose a
PRNG(RngLib).
It may supports the SE TRNG in the future, and will change to the TRNG
when SE support becomes available.
Signed-off-by: Chao Li <lichao@loongson.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
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Added LoongArch64 stack cookie interrupt instance, calling `CpuBreakpoint`
to stop the CPU.
Signed-off-by: Chao Li <lichao@loongson.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
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In SbiMpxyGetShmemSize(), ShmemSize is not assigned in the failure
path, but the caller may still access it. Initialize ShmemSize to
zero to fix the uninitialized variable warning.
Signed-off-by: Tuan Phan <tuan.phan@oss.qualcomm.com>
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Cases when MPXY extension is not present or it fails, the system boot fails.
This is easily reproducible with Qemu master branch.
Remove the constructor and let RAS agent client initialize the MPXY library
and fail graceully in case of errors but the boot process continue.
Signed-off-by: Himanshu Chauhan <himanshu.chauhan@oss.qualcomm.com>
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Replace manual alignment checks with IS_ALIGNED() and
ADDRESS_IS_ALIGNED().
Convert the following bitmask and modulo forms:
- ((E & ((PowOf2Expr) - ONE)) == ZERO)
- ((E & ((PowOf2Expr) - ONE)) != ZERO)
- ((E % (PowOf2Expr)) == ZERO)
- ((E % (PowOf2Expr)) != ZERO)
to the corresponding helper macro forms:
+ IS_ALIGNED (E, PowOf2Expr)
+ !IS_ALIGNED (E, PowOf2Expr)
PowOf2Expr is limited to known power-of-two expressions, including
SIZE_* and BASE_* macros, EFI_PAGE_SIZE, CPU_STACK_ALIGNMENT,
RUNTIME_PAGE_ALLOCATION_GRANULARITY, sizeof() of UEFI integer types
(e.g. BOOLEAN, CHAR16, UINT32, UINTN) and pointer types, and 1 << E1
expressions.
Address checks that cast the checked value to UINTN are written with
ADDRESS_IS_ALIGNED().
The change was generated with the Coccinelle semantic patch below.
```smpl
@power_of_2_expr@
expression PowOf2Expr;
expression E1;
typedef BOOLEAN, CHAR8, CHAR16, INT8, UINT8, INT16, UINT16, INT32, UINT32, INT64, UINT64, INTN, UINTN;
type ScalarType = { BOOLEAN, CHAR8, CHAR16, INT8, UINT8, INT16, UINT16, INT32, UINT32, INT64, UINT64, INTN, UINTN };
type AnyType;
type PointerType = AnyType *;
idexpression ScalarType ScalarValue;
idexpression PointerType PointerValue;
constant SizeBase =~ "^(SIZE|BASE)_(1|2|4|8|16|32|64|128|256|512)[KMGTPE]B$";
constant NamedPowerOf2 =~ "^(EFI_PAGE_SIZE|CPU_STACK_ALIGNMENT|RUNTIME_PAGE_ALLOCATION_GRANULARITY)$";
constant ONE = {1, 1U, 1u};
@@
(
(
SizeBase
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NamedPowerOf2
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ONE << E1
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sizeof (ScalarType)
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sizeof (PointerType)
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sizeof (ScalarValue)
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sizeof (PointerValue)
)
&
PowOf2Expr
)
@aligned depends on power_of_2_expr disable is_zero,isnt_zero@
expression E;
expression power_of_2_expr.PowOf2Expr;
constant ONE = {1, 1U, 1u};
constant ZERO = {0, 0U, 0u};
@@
(
((E & (E - ONE)) == ZERO)
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- ((E & ((PowOf2Expr) - ONE)) == ZERO)
+ IS_ALIGNED (E, PowOf2Expr)
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((E & (E - ONE)) != ZERO)
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- ((E & ((PowOf2Expr) - ONE)) != ZERO)
+ !IS_ALIGNED (E, PowOf2Expr)
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- ((E % (PowOf2Expr)) == ZERO)
+ IS_ALIGNED (E, PowOf2Expr)
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- ((E % (PowOf2Expr)) != ZERO)
+ !IS_ALIGNED (E, PowOf2Expr)
)
@address_is_aligned@
typedef UINTN;
expression *Address;
expression Alignment;
@@
- IS_ALIGNED ((UINTN) Address, Alignment)
+ ADDRESS_IS_ALIGNED (Address, Alignment)
@normalize_aligned disable paren expression@
expression E, SZ;
@@
(
- (IS_ALIGNED (E, SZ))
+ IS_ALIGNED (E, SZ)
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- (!IS_ALIGNED (E, SZ))
+ !IS_ALIGNED (E, SZ)
)
@normalize_macro_args disable paren expression@
expression E, SZ;
@@
(
- IS_ALIGNED ((E), SZ)
+ IS_ALIGNED (E, SZ)
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- IS_ALIGNED (E, (SZ))
+ IS_ALIGNED (E, SZ)
)
```
Signed-off-by: Mingjie Shen <shen497@purdue.edu>
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GCC may emit a call to __ashlti3 for 128-bit left shifts when
compiling code that uses unsigned __int128, such as OpenSSL Curve448
code in CryptoPkg. The LoongArch64 firmware build does not link against
libgcc, so provide the helper from CompilerIntrinsicsLib.
Implement __ashlti3 using the LoongArch64 ABI: the low and high 64-bit
halves are passed in $a0 and $a1, the shift count is passed in $a2, and
the result is returned in $a0 and $a1.
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Chao Li <lichao@loongson.cn>
Signed-off-by: zhubo <zhubo@loongson.cn>
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Add UEFI-native wrappers for libfdt string list count and search APIs.
Signed-off-by: Thamballi Sreelalitha <sreelali@qti.qualcomm.com>
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[Sources] appears twice in BaseMemoryLibOptDxe.inf, [Sources.X64]
appears twice in StandaloneMmCoreEntryPoint.inf, remove the redundant
ones to make the files more concise.
Signed-off-by: Qihang Gao <gaoqihang@loongson.cn>
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GCC 17 (upcoming release) is updating the type of
__stack_chk_guard from a void * to a uintptr_t.
This is only a type change, not a size change. However,
it does cause the GCC 17 build to fail because of the
type mismatch.
uintptr_t is defined as unsigned long, which is not
a type edk2 defines. It has the same size as UINTN
on a given system, but on 64 bit systems we have the
same type issue because UINTN is defined as unsigned long long,
not unsigned long.
To work around this and avoid defining a new type in edk2,
use the compiler built in __UINTPTR_TYPE__ which is the
underlying definition in GCC.
This is a backwards compatible change with previous versions
of GCC and CLANGDWARF but also fixes the upcoming definition
change for GCC 17.
Signed-off-by: Oliver Smith-Denny <osde@microsoft.com>
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Add the RAS agent client library which is used to communicate to
a remote RAS agent. The RAS agent can be queried about the details
of various hardware error sources in the system.
Signed-off-by: Himanshu Chauhan <himanshu.chauhan@oss.qualcomm.com>
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Add SBI Mpxy client library to communicate using RPMI or other
protocols using SBI MPXY extension.
Signed-off-by: Himanshu Chauhan <himanshu.chauhan@oss.qualcomm.com>
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Extensions should be detected before they can be used. Add a function
to detect the support for an SBI extension using probe extension SBI
function.
Signed-off-by: Himanshu Chauhan <himanshu.chauhan@oss.qualcomm.com>
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Add new SBI error codes in translate_error and map them
to suitable EFI error codes.
Signed-off-by: Himanshu Chauhan <himanshu.chauhan@oss.qualcomm.com>
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This fixes all non-breaking spelling errors in
MdePkg.
Signed-off-by: Oliver Smith-Denny <osde@microsoft.com>
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Commit 8c654bb3ec sets FUA bit forcefully in SCSI sync I/O to
avoid possible data loss. However, it may cause issues for the
storage without the support FUA and WCE.
For example, Windows Server 2025 guest fails to boot from
vhost-scsi block device in such scenario. The booting Error
code is 0xc0000185, the SCSI command fails with the following,
Mode Sense Key: EFI_SCSI_SK_ILLEGAL_REQUEST
Additional Sense Code: EFI_SCSI_ASC_INVALID_FIELD
This patch gets the FUA and WCE support of the storage and sets
FUA conditionally.
Continuous-integration-options: PatchCheck.ignore-multi-package
Signed-off-by: Annie Li <annie.li@oracle.com>
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Add FFA_FEATURES_MEM_RETRIEVE_REQ_NS_SUPPORT macro and use it in
FFA_FEATURES call for FFA_MEM_RETRIEVE_REQ to indicate NS bit usage
support.
According to DEN0140 FF-A Memory Management Protocol v1.3 ALP1
specification section 1.10.4.1.1 "Discovery of NS bit usage":
"A v1.1 SP must set Bit[1] in the Input properties parameter."
This bit indicates that the Secure Partition supports interpreting
the NS (Non-Secure) bit in FFA_MEM_RETRIEVE_RESP invocations from
the SPMC (Secure Partition Manager Core). The NS bit is used to
specify the security state of a memory region being retrieved.
The Hafnium SPMC implementation enforces this requirement for FF-A
v1.1+ endpoints. Without this bit set, Hafnium returns FFA_NOT_SUPPORTED:
This change is required for proper operation with Hafnium and other
v1.1+ compliant SPMCs that enforce NS bit negotiation.
Signed-off-by: Kannan Suprayan <kannan.suprayan@arm.com>
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Add helper function to check if the Realm Management
Extension (RME) is implemented by the hardware.
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Leif Lindholm <leif.lindholm@oss.qualcomm.com>
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
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ArmLib doesn't actually depend on DebugLib and
is used in places where having additional
dependencies would be incorrect.
Drop it.
Signed-off-by: Oliver Smith-Denny <osde@microsoft.com>
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Per
https://edk2.groups.io/g/devel/topic/move_armlib_to_baselib/118541649,
this commit moves ArmLib to MdePkg and updates all consumers.
The only change to ArmLib itself is to remove ArmPkg.dec from
the inf.
Continuous-integration-options: PatchCheck.ignore-multi-package
Signed-off-by: Oliver Smith-Denny <osde@microsoft.com>
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FdtStrerror
Update the FdtOverlayApply() function to mark the Fdt pointer
as an IN OUT variable. The internal fdt_overlay_apply() function
returns the merged blob in the Fdt variable.
Update FdtStrerror to have it's return type on a single line, aligning
the style with the rest of the file.
Signed-off-by: Antaeus Kleinert-Strand <antklein@microsoft.com>
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Update FdtGetName() and FdtGetPath() to correctly mark the VOID *Fdt
as a CONST variable. This aligns with the internal libfdt
implementation.
Update MockFdtLib.h to align with the updated inputs for FdtGetName()
and FdtGetPath().
Signed-off-by: Antaeus Kleinert-Strand <antklein@microsoft.com>
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Add support for the define FdtForEachPropertyOffset and
FdtFindMaxPhandle() wrappers.
Signed-off-by: Antaeus Kleinert-Strand <antklein@microsoft.com>
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Signed-off-by: Ray Ni <ray.ni@intel.com>
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To keep folder name consistent for RISC-V specific code, rename it to
RiscV and update the INF file to reflect it. Since review notifications
depend on the folder name, the naming should be consistent.
Signed-off-by: Sunil V L <sunilvl@oss.qualcomm.com>
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Fix markdownlint formatting issues in README. Ignore `mipisyst`
markdownlint since it is a separate public repo outside of the edk2
ecosystem.
Signed-off-by: Sherry Fan <sherryfan@microsoft.com>
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Currently, the name of LoongArch floating-point CSR register 0 uses the
register number, it has been renamed to an alias to improve readability
and compiler compatibility.
Signed-off-by: Chao Li <lichao@loongson.cn>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
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Replace traditional `#ifndef`/`#define`/`#endif` include guards with
`#pragma` once.
`#pragma once` is a widely supported preprocessor directive that
prevents header files from being included multiple times. It is
supported by all toolchains used to build edk2: GCC, Clang/LLVM, and
MSVC.
Compared to macro-based include guards, `#pragma once`:
- Eliminates the risk of macro name collisions or copy/paste errors
where two headers inadvertently use the same guard macro.
- Eliminate inconsistency in the way include guard macros are named
(e.g., some files use `__FILE_H__`, others use `FILE_H_`, etc.).
- Reduces boilerplate (three lines replaced by one).
- Avoids polluting the macro namespace with guard symbols.
- Can improve build times as the preprocessor can skip re-opening the
file entirely, rather than re-reading it to find the matching
`#endif` ("multiple-include optimization").
- Note that some compilers may already optimize traditional include
guards, by recognzining the idiomatic pattern.
This change is made acknowledging that overall portability of the
code will technically be reduced, as `#pragma once` is not part of the
C/C++ standards.
However, this is considered acceptable given:
1. edk2 already defines a subset of supported compilers in
BaseTools/Conf/tools_def.template, all of which have supported
`#pragma once` for over two decades.
2. There have been concerns raised to the project about inconsistent
include guard naming and potential macro collisions.
Approximate compiler support dates:
- MSVC: Supported since Visual C++ 4.2 (1996)
- GCC: Supported since 3.4 (2004)
(http://gnu.ist.utl.pt/software/gcc/gcc-3.4/changes.html)
- Clang (LLVM based): Since initial release in 2007
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
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Replacing the non-ASCII characters with ASCII characters fixes build failures onWindows systems using non-English locales. These characters trigger MSVC warningC4819 (“file contains a character that cannot be represented in the current codepage”), which becomes an error when /WX is enabled.
Cc: Sachin Ganesh <sachinganesh@ami.com>
Signed-off-by: dhiineshm <dhiineshm@ami.com>
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The word property is misspelled as propery, so fix it.
Signed-off-by: Qihang Gao <gaoqihang@loongson.cn>
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VS2022 NOOPT IA32 builds of BaseFdtLib introduce use of
intrinsics __allshl and __aullshr from the libfdt submodule
that can not be modified. Add the implementation of
__allshl and __aullshr intrinsics from from the CryptoPkg
to BaseFdtLib.
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
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Add FDT_HEADER field accessors and FdtOverlayApply() wrapper.
Signed-off-by: Mario Bălănică <mariobalanica02@gmail.com>
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In FvLib library, FindFsSectionInSection function may not find the ffs
section where the second (or later) is located. It is due to a wrong
section address that does not consider section alignment. Support the
alignment to check multiple ffs sections correctly.
Signed-off-by: Phil Noh <Phil.Noh@amd.com>
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PE targets do not support the ELF style .type, .size,
or .previous directives and have different name mangling,
so this commit updates MdePkg AArch64 code to support
PE targets.
PE targets also don't support the fixup_aarch64_ldr_pcrel_imm19
relocation type, which is created doing ldr <literal>. This
introduces a new set of macros, LDR_LIT nad LDR_LIT_TMP,
which will use the direct ldr for ELF targets and ADRP/LDR
for PE targets, because the ADRP/LDR version requires
4KB alignment, which is guaranteed on CLANGPDB.
Signed-off-by: Oliver Smith-Denny <osde@microsoft.com>
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LoongArch64 currently dose not support HW or a standards-compliant RNG.
Read the stable time twice performs an XOR, and then use xorshift
algorithm(from Marsaglia's xorshift generator) to generate a
pseudo-random number.
It's not random enough, but it's definitely better than just using a
timer(BaseRngLibTimerLib).
Signed-off-by: Chao Li <lichao@loongson.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
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Fixes https://github.com/tianocore/edk2/issues/11898
According to the comment of macro, bits 5..7 of PostCode are mapped
to bits 24..26 of status code value, so the correct number should
be 0xe0 instead of 0x03.
Signed-off-by: Qihang Gao <gaoqihang@loongson.cn>
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Always access PcdControlFlowEnforcementPropertyMask using
FixedPcdGet() in NASM source files and update INFs to correctly
declare that PcdControlFlowEnforcementPropertyMask is always
accessed as a Fixed PCD.
PcdControlFlowEnforcementPropertyMask is declared in MdePkg.dec
in the [PcdsFixedAtBuild] section, so this PCD does not support
any other PCD access types.
This change resolves ld warnings from GCC and CLANGDWARF builds
for relocations in read-only text sections because use of PcdGet()
in NASM source files reads the value into eax from the memory
location of a const global variable that requires a relocation
fixup.
By changing PcdGet() to FixedPcdGet(), eax is loaded with an
immediate value known at build time and no relocation fixups for
PcdControlFlowEnforcementPropertyMask are required.
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
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