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BuildFadtTable() adds platform-provided fixed-feature flags before
calling FadtArchUpdate(). The Arm and RISC-V implementations assign
Fadt->Flags, discarding the flags already added by the platform.
Use bitwise OR assignment to add architecture defaults without
overwriting the existing flags. Leave the generation order, validation
masks, ACPI revision handling, and architecture defaults unchanged.
Signed-off-by: Djordje Nedic <djordje.nedic@nextsilicon.com>
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Add a common Error Record Serialization Table (ERST) generator based on
the ACPI 6.6 definition. Introduce an architecture-common Configuration
Manager object to provide serialization instruction entries.
Validate actions, instructions, flags, register masks, action grouping,
and GOTO targets before generating the table.
Signed-off-by: Amrathesh <amrathesh@arm.com>
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Add a common Boot Error Record Table (BERT) generator based on the
ACPI 6.6 definition. Introduce an architecture-common Configuration
Manager object that provides the boot error region address and length.
Signed-off-by: Amrathesh <amrathesh@arm.com>
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For GicV5 ITS, it should be iterated with GicItsV5Info not GicItsInfo
in SratGenerator. Fix wrong iteration.
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
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Generate GICv5 related information in SRAT table.
Signed-off-by: Sarah Walker <Sarah.Walker2@arm.com>
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Add MSCT table ID to the ESTD_ACPI_TABLE_ID enumeration.
Introduces an ACPI MSCT (Maximum System Characteristics Table)
generator library that retrieves the following information from the
configuration manager:
- Maximum physical address
- Processor proximity information
- Memory proximity information
- Clock proximity information
The generator calculates:
- Maximum memory length per memory domain
- Maximum contiguous processor domain
- Maximum memory and processor domain combination
Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
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The EINJ generator validates that an instruction mask fits within the
register region width by shifting the 64-bit mask by RegisterBitWidth.
When RegisterBitWidth is 64, this shifts a UINT64 value by its full
width, which is undefined behavior in C. A 64-bit mask always fits
within a 64-bit register and does not require this check.
Only perform the shift when RegisterBitWidth is less than 64, and
reject widths greater than 64 because the EINJ Mask field is 64 bits.
Signed-off-by: Varshit Pandya <Varshit.Pandya@arm.com>
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Remove the ACPI_AML_STA_PROC_SUPPORTED macro to make use
of the new MdePkg macro: ACPI_AML_STA_BASE_SUPPORTED.
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
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Make use of the previously introduced StaToken field to
generate a _STA method describing the status of a processor
or processor container.
staSupp
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
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The current instance does not support host based test on AArch64 host
system due to its dependency on hardware UART library.
This change created a new instance that does not initialize the serial
port for host based test applications.
Signed-off-by: Kun Qin <kun.qin@microsoft.com>
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- Add unit tests for HMAT generator.
Co-authored-by: Ryan Heise <heiserya@google.com>
Signed-off-by: Oleksandr Tymoshenko <ovt@google.com>
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- Generate HMAT table from ConfigurationManager objects.
Co-authored-by: Ryan Heise <heiserya@google.com>
Co-authored-by: Sophia Wang <yodagump@google.com>
Signed-off-by: Oleksandr Tymoshenko <ovt@google.com>
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Move the ACPI table helper macros from EmbeddedPkg's AcpiLib.h to
MdeModulePkg's AcpiHelperMacros.h.
These macros describe ACPI data initializers and do not depend on the
AcpiLib library interface. Keeping them in AcpiLib.h forces users that
only need the macros to include the AcpiLib library header unnecessarily.
Place the macros in a common MdeModulePkg public header so ACPI table
producers can include the macro definitions directly without implying
use of AcpiLib.
The companion edk2-platforms change is:
"Global: Include AcpiHelperMacros.h for ACPI helper macros"
Tested:
DynamicTablesPkg: X64/AARCH64 DEBUG/RELEASE/NOOPT
MdeModulePkg: X64/AARCH64 DEBUG/RELEASE/NOOPT
EmbeddedPkg: X64/AARCH64 DEBUG/RELEASE/NOOPT
Continuous-integration-options: PatchCheck.ignore-multi-package
Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
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Add an ACPI Error Injection (EINJ) table generator that uses the
Configuration Manager to obtain the platform error-injection
instruction entries.
Ref: ACPI Specification, Section 18.6 (Error Injection—EINJ table).
Co-authored-by: Varshit Pandya <varshit.pandya@arm.com>
Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
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Add ACPI Hardware Error Source Table (HEST) generator.
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
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Replace traditional `#ifndef`/`#define`/`#endif` include guards with
`#pragma` once.
`#pragma once` is a widely supported preprocessor directive that
prevents header files from being included multiple times. It is
supported by all toolchains used to build edk2: GCC, Clang/LLVM, and
MSVC.
Compared to macro-based include guards, `#pragma once`:
- Eliminates the risk of macro name collisions or copy/paste errors
where two headers inadvertently use the same guard macro.
- Eliminate inconsistency in the way include guard macros are named
(e.g., some files use `__FILE_H__`, others use `FILE_H_`, etc.).
- Reduces boilerplate (three lines replaced by one).
- Avoids polluting the macro namespace with guard symbols.
- Can improve build times as the preprocessor can skip re-opening the
file entirely, rather than re-reading it to find the matching
`#endif` ("multiple-include optimization").
- Note that some compilers may already optimize traditional include
guards, by recognzining the idiomatic pattern.
This change is made acknowledging that overall portability of the
code will technically be reduced, as `#pragma once` is not part of the
C/C++ standards.
However, this is considered acceptable given:
1. edk2 already defines a subset of supported compilers in
BaseTools/Conf/tools_def.template, all of which have supported
`#pragma once` for over two decades.
2. There have been concerns raised to the project about inconsistent
include guard naming and potential macro collisions.
Approximate compiler support dates:
- MSVC: Supported since Visual C++ 4.2 (1996)
- GCC: Supported since 3.4 (2004)
(http://gnu.ist.utl.pt/software/gcc/gcc-3.4/changes.html)
- Clang (LLVM based): Since initial release in 2007
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
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Add support for generating the ACPI SRAT (System Resource Affinity Table)
for RISC-V platforms.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
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Add support for generating the ACPI DBG2 (Debug Port Table) for RISC-V
platforms.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
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Add support for generating the Fixed ACPI Description Table (FADT) for
RISC-V platforms using the common FADT generator.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
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Add support for generating CPU topology information for RISC-V platforms
based on RINTC structures.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
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Modify the interrupt flags SPI range validation to apply only for ARM
architectures. This check ensures that interrupt flags are valid SPIs,
but it is ARM-specific and may cause false assertions on other
architectures.
By enabling this check exclusively for ARM, we avoid erroneous
assertions on non-ARM platforms.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
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In "if (RpInfo[Index].Sun != MAX_UINT64)", "RpInfo[Index].Sun" is UINT32 type.
Which means it is never going to be equal to MAX_UINT64, so use
"RpInfo[Index].Sun != MAX_UINT32" instead.
Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
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This change introduces support for root port devices and their
corresponding _PRT (PCI Routing Table) entries in the PCIe SSDT.
Updates the PCIe SSDT generator to detect and use the root port token.
When available, the generator reads the configuration and creates device
entries with appropriate _PRT tables.
Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
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X64 platforms supports WordIo and uncached PCIe resources.
Hence, include WordIo and uncached PCIe resources in _CRS.
Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
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edk2 is dropping support for the ARM32 architecture. This
commit removes ARM32 code from DynamicTablesPkg. This also
drops irrelevant VALID_ARCHITECTURES comments from infs that
are not arch specific.
Signed-off-by: Oliver Smith-Denny <osde@microsoft.com>
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All DynamicTablesPkg libraries and drivers execute in the DXE phase,
where both AMD and Intel platforms operate in X64 (64-bit) mode.
Therefore, IA32 (32-bit) support is no longer required for DynamicTablesPkg.
Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
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Introduce EArchCommonObjMcfgPciConfigSpaceInfo as an alias for
EArchCommonObjPciConfigSpaceInfo.
The CM_ARCH_COMMON_PCI_CONFIG_SPACE_INFO object is utilized by both
the MCFG and ACPI SSDT PCIE generators. Assigning a unique configuration
object ID ensures the platform configuration driver supplies the correct data.
Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
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Introduce Tpm2DeviceTableLib to generate SSDT table which describes
Tpm2 devices.
This dynamic table generation is controlled by PcdGenTpm2DeviceTable
which default value is FALSE.
When it is TRUE, the TPM2 device ssdt table is generated when TPM2 ACPI
table is generated.
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
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Update unit tests to use GoogleTestLib.h instead
of gtest.h so the edk2 extensions for google tests
are always available.
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
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Introduce optional configuration objects to specify interrupt and terminal types.
When the platform supplies this information,
the SPCR table is updated to reflect the provided values.
If the interrupt type is 8259,
the corresponding IRQ number is set in the SPCR table.
Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
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Introduce a common architecture SLIT table generator library
that retrieves locality domain distance information from
the configuration manager and generates the table accordingly.
Signed-off-by: abdattar <AbdulLateef.Attar@amd.com>
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Following the addition of the CM_ARCH_COMMON_PROXIMITY_DOMAIN_INFO
object, rework the Srat Generator.
A Warning message is issued when the Original ProximityDomain
fields are used.
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
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The ACPI specification v6.5, sTable 5.158: Processor Structure Flags
states that:
"""
The processor container will have a matching ID
value returned through the _UID method. As not every pro-
cessor hierarchy node structure in PPTT may have a matching
processor container, this flag indicates whether the ACPI pro-
cessor ID points to valid entry. Where a valid entry is possible
the ACPI Processor ID and _UID method are mandatory.
"""
And in:
Table 5.157: Processor Hierarchy Node Structure
"""
If the processor structure rep-
resents a group of associated processors, the structure might
match a processor container in the name space. In that case
this entry will match the value of the _UID method of the as-
sociated processor container. Where there is a match it must
be represented. The flags field, described in Processor Struc-
ture Flags, includes a bit to describe whether the ACPI pro-
cessor ID is valid.
"""
The DynamicTablesPkg currently creates a processor container:
- in the SSDT CPU Topology generator, with the _HID=ACPI0010,
and with a valid _UID
- in the PPTT table
for each CM_ARCH_COMMON_PROC_HIERARCHY_INFO structure.
Thus:
- all the processor containers should have the VALID bit set
if the SSDT CPU Topology table is present.
- if the SSDT CPU Topology table is present, but there is no
PPTT table, then the state of the VALID bit is ignored.
A contrario, an example where the VALID bit should not be set
would be if:
- the SSDT CPU Topology generator is absent
- no processor container is created in the SSDT topology,
i.e. if a flat hierarchy is created.
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
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The processor containers might have an associated _UID:
- in their SSDT topology representation
- in their PPTT representation, in the "ACPI Processor ID" field
The _UID of the processor containers is independently generated
by the PPTT and SSDT CPU topology generators. Make use of the newly
created MetadataObjLib to generate a unique and common per-processor
container _UID values.
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
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The processor containers might have an associated _UID:
- in their SSDT topology representation
- in their PPTT representation, in the "ACPI Processor ID" field
The _UID of the processor containers is independently generated
by the PPTT and SSDT CPU topology generators. Make use of the newly
created MetadataObjLib to generate a unique and common per-processor
container _UID values.
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
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ProximityDomain31To8[0] is overwritten by the ProximityDomain
at bits [17-24] and [25-31]. Populate ProximityDomain31To8[1]
and ProximityDomain31To8[2] instead.
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
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TPM2 ACPI table revision 5 add CRB interface with FF-A method.
This patch supports generation of TPM2 ACPI table revision 5 with
this method.
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
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- Add unit tests for CEDT generator.
Signed-off-by: Nick Graves <nicholasgraves@google.com>
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- Generate CEDT table from ConfigurationManager objects.
- Only CHBS and CFMWS sub-tables are supported currently.
Signed-off-by: Nick Graves <nicholasgraves@google.com>
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This commit adds a hostbased test for the
Dbg2Generator library. The test is designed to
be run on a host machine against a UEFI image
that has been built with the DynamicTablesPkg.
The test exercises the Dbg2Generator library by
building an ACPI DBG2 from a list of devices.
Signed-off-by: Jeff Brasen <jbrasen@nvidia.com>
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This commit adds support for building non-serial DBG2 devices
1. Add new common namespace objects:
- EArchCommonObjMemoryRangeDescriptor
- EArchCommonObjDbg2DeviceInfo
2. Enhance DBG2 table generator:
- Add support for non-serial DBG2 devices
- Support multiple debug devices
- Improve memory handling with proper allocation checks
- Add better cleanup in error paths
3. Update configuration manager:
- Add parsers for new common namespace objects
Signed-off-by: Jeff Brasen <jbrasen@nvidia.com>
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Add support for X64 Build needed for HostBasedTests
Signed-off-by: Jeff Brasen <jbrasen@nvidia.com>
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The SPCR specification at
https://learn.microsoft.com/en-us/windows-hardware/drivers/bringup/serial-port-console-redirection-table
states that baud rate 0 is interpreted as "as-is". This indicates that the
OS should rely on the current UART configuration until the full featured
driver is initialized.
Signed-off-by: Sarah Walker <Sarah.Walker2@arm.com>
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Revision 4 adds fields for UART clock frequency, precise baud rate and ACPI
object namespace string. The revision 4 specification is at
https://learn.microsoft.com/en-us/windows-hardware/drivers/bringup/serial-port-console-redirection-table
Signed-off-by: Sarah Walker <Sarah.Walker2@arm.com>
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Relocate StaToken detection and _STA method generation logic
within the loop for each processor object.
Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
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Implement the _STA method for the CPU object based on
the value provided by the configuration manager.
Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
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Introduce _PSD and _CPC ACPI objects for X64 platforms.
Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
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This patch adds several ACPI objects to the X64 CPU SSDT table
to enhance power and performance management.
The new objects include:
- _CST: Defines CPU idle states for power saving.
- _CSD: Specifies dependencies between CPU idle states.
- _PCT: Provides an interface for controlling CPU performance states.
- _PSS: Lists supported CPU performance states.
- _PPC: Indicates current CPU performance capabilities.
These additions help improve power efficiency and thermal management in X64 systems.
Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
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Adds X64 support to the SRAT table generator library.
Adds EX64ObjLocalApicX2ApicAffinity CM object to get
platform configuration information.
Update the parser with newly added CM object.
Cc: Sami Mujawar <Sami.Mujawar@arm.com>
Cc: Pierre Gondois <pierre.gondois@arm.com>
Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
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The BDF format for PCI initiators in the SRAT table is incorrect.
The format is not a UINT16 but specific bytes.
PCI Bus Number (Bits 7:0 of Byte 2)
PCI Device Number (Bits 7:3 of Byte 3)
PCI Function Number (Bits 2:0 of Byte 3)
REF: https://uefi.org/specs/ACPI/6.5/05_ACPI_Software_Programming_Model.html#device-handle-pci
Signed-off-by: Jeff Brasen <jbrasen@nvidia.com>
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