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path: root/lib/utils/ipi/fdt_ipi_plicsw.c
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2024-11-28lib: utils/ipi: Use fdt_driver for initializationSamuel Holland1-2/+2
The ipi driver subsystem does not need any extra data, so it can use `struct fdt_driver` directly. The generic fdt_ipi_init() performs a best-effort initialization of all matching DT nodes. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-11-11platform: Drop IPI warm init and exit hooksSamuel Holland1-2/+0
Now that the SBI IPI core clears IPIs at warm boot in a generic way, none of the drivers or platforms use these hooks, and we can remove them. Platforms need only to initialize the driver once during cold init. If other hooks are needed in the future, they can be added to struct sbi_ipi_device. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-11-11lib: sbi_ipi: Move initial IPI clear to sbi_ipi_init()Samuel Holland1-1/+1
sbi_ipi_init() expects the platform warm init function to clear IPIs on the local hart, but there is already a generic function to do this. After this change, none of the existing drivers need a warm init callback. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2024-08-24lib: utils/ipi: Constify FDT pointers in parsing functionsSamuel Holland1-2/+2
Indicate that none of these functions modify the devicetree by constifying the parameter type. Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-10-23lib: utils/ipi: Add Andes fdt ipi driver supportYu Chien Peter Lin1-0/+47
Move Andes PLICSW ipi device to fdt ipi framework, this patch is based on Leo's modified IPI scheme on PLICSW. Current IPI scheme uses bit 0 of pending reigster on PLICSW to send IPI from hart 0 to hart 7, but bit 0 needs to be hardwired to 0 according to spec. After some investigation, self-IPI seems to be seldom or never used, so we re-order the IPI scheme to support 8 core platforms. dts example (Quad-core AX45MP): plicsw: interrupt-controller@e6400000 { compatible = "andestech,plicsw"; reg = <0x00000000 0xe6400000 0x00000000 0x00400000>; interrupts-extended = <&CPU0_intc 3 &CPU1_intc 3 &CPU2_intc 3 &CPU3_intc 3>; interrupt-controller; #address-cells = <2>; #interrupt-cells = <2>; }; Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Anup Patel <anup@brainfault.org>