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path: root/drivers/iommu/intel-pasid.c
AgeCommit message (Expand)AuthorFilesLines
2020-06-10iommu/vt-d: Move Intel IOMMU driver into subdirectoryJoerg Roedel1-853/+0
2020-05-25iommu/vt-d: Fix pointer cast warnings on 32 bitLu Baolu1-4/+4
2020-05-18iommu/vt-d: Disable non-recoverable fault processing before unbindLu Baolu1-5/+21
2020-05-18iommu/vt-d: Multiple descriptors per qi_submit_sync()Lu Baolu1-2/+2
2020-05-18iommu/vt-d: Add get_domain_info() helperLu Baolu1-6/+6
2020-05-18iommu/vt-d: Enlightened PASID allocationLu Baolu1-0/+57
2020-05-18iommu/vt-d: Support flushing more translation cache typesJacob Pan1-1/+2
2020-05-18iommu/vt-d: Add nested translation helper functionJacob Pan1-3/+171
2020-05-18iommu/vt-d: Use a helper function to skip agaw for SLJacob Pan1-10/+23
2020-01-07iommu/vt-d: Add PASID_FLAG_FL5LP for first-level pasid setupLu Baolu1-5/+2
2020-01-07iommu/vt-d: Replace Intel specific PASID allocator with IOASIDJacob Pan1-36/+0
2020-01-07iommu/vt-d: Avoid duplicated code for PASID setupJacob Pan1-30/+18
2020-01-07iommu/vt-d: Match CPU and IOMMU paging modeJacob Pan1-2/+10
2019-07-04Merge branches 'x86/vt-d', 'x86/amd', 'arm/smmu', 'arm/omap', 'generic-dma-op...Joerg Roedel1-1/+1
2019-05-27iommu/vt-d: Set the right field for Page Walk SnoopLu Baolu1-1/+1
2019-05-27iommu/vt-d: Introduce macros useful for dumping DMAR tableSai Praneeth Prakhya1-17/+0
2019-05-03iommu/vt-d: Fix leak in intel_pasid_alloc_table on error pathEric Auger1-1/+3
2019-03-01iommu/vt-d: Get domain ID before clear pasid entryLu Baolu1-1/+1
2018-12-11iommu/vt-d: Shared virtual address in scalable modeLu Baolu1-1/+1
2018-12-11iommu/vt-d: Add first level page table interfaceLu Baolu1-0/+80
2018-12-11iommu/vt-d: Add second level page table interfaceLu Baolu1-0/+280
2018-12-11iommu/vt-d: Manage scalalble mode PASID tablesLu Baolu1-15/+72
2018-07-20iommu/vt-d: Per PCI device pasid table interfacesLu Baolu1-0/+179
2018-07-20iommu/vt-d: Global PASID name spaceLu Baolu1-0/+60
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