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| author | Lu Baolu <baolu.lu@linux.intel.com> | 2020-05-16 09:20:55 +0300 |
|---|---|---|
| committer | Joerg Roedel <jroedel@suse.de> | 2020-05-18 16:37:26 +0300 |
| commit | 8a1d824625402b3ef3c3e5965663354ff0394d86 (patch) | |
| tree | 38ef2a4bd725cd3cdf73e8656fc5cf2e08236fb8 /drivers/iommu/intel-pasid.c | |
| parent | 064a57d7ddfc46ada02b477b91c478001b03bfa3 (diff) | |
| download | linux-8a1d824625402b3ef3c3e5965663354ff0394d86.tar.xz | |
iommu/vt-d: Multiple descriptors per qi_submit_sync()
Current qi_submit_sync() only supports single invalidation descriptor
per submission and appends wait descriptor after each submission to
poll the hardware completion. This extends the qi_submit_sync() helper
to support multiple descriptors, and add an option so that the caller
could specify the Page-request Drain (PD) bit in the wait descriptor.
Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Link: https://lore.kernel.org/r/20200516062101.29541-13-baolu.lu@linux.intel.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'drivers/iommu/intel-pasid.c')
| -rw-r--r-- | drivers/iommu/intel-pasid.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/iommu/intel-pasid.c b/drivers/iommu/intel-pasid.c index c46a068142b9..45e9b5b291bc 100644 --- a/drivers/iommu/intel-pasid.c +++ b/drivers/iommu/intel-pasid.c @@ -438,7 +438,7 @@ pasid_cache_invalidation_with_pasid(struct intel_iommu *iommu, desc.qw2 = 0; desc.qw3 = 0; - qi_submit_sync(&desc, iommu); + qi_submit_sync(iommu, &desc, 1, 0); } static void @@ -452,7 +452,7 @@ iotlb_invalidation_with_pasid(struct intel_iommu *iommu, u16 did, u32 pasid) desc.qw2 = 0; desc.qw3 = 0; - qi_submit_sync(&desc, iommu); + qi_submit_sync(iommu, &desc, 1, 0); } static void |