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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
drivers
/
gpu
/
drm
/
i915
/
intel_dpll_mgr.h
Age
Commit message (
Expand
)
Author
Files
Lines
2018-09-04
drm/i915: Fix ICL+ HDMI clock readout
Ville Syrjälä
1
-0
/
+1
2018-06-21
drm/i915/icl: Fix MG PLL setup when refclk is 38.4MHz
Imre Deak
1
-0
/
+2
2018-06-15
drm/i915/icl: start adding the TBT pll
Paulo Zanoni
1
-5
/
+9
2018-06-02
drm/i915/icl: Get DDI clock for ICL based on PLLs.
Manasi Navare
1
-0
/
+2
2018-05-08
drm/i915/icl: add basic support for the ICL clocks
Paulo Zanoni
1
-0
/
+41
2018-03-27
drm/i915: reorder dpll_info members
Lucas De Marchi
1
-5
/
+8
2018-03-27
drm/i915: use flags from dpll_info embedded in intel_shared_dpll
Lucas De Marchi
1
-10
/
+8
2018-03-27
drm/i915: use id from intel_shared_dpll.info
Lucas De Marchi
1
-6
/
+4
2018-03-27
drm/i915: use name from intel_shared_dpll.info
Lucas De Marchi
1
-5
/
+3
2018-03-27
drm/i915: use funcs from intel_shared_dpll.info
Lucas De Marchi
1
-5
/
+3
2018-03-27
drm/i915: add dpll_info inside intel_shared_dpll
Lucas De Marchi
1
-0
/
+5
2018-03-27
drm/i915: move dpll_info to header
Lucas De Marchi
1
-0
/
+10
2017-06-12
drm/i915/cnl: Initialize PLLs
Rodrigo Vivi
1
-0
/
+4
2017-02-10
drm/i915: Remove unused function intel_ddi_get_link_dpll()
Ander Conselvan de Oliveira
1
-16
/
+0
2016-12-30
drm/i915: Add dpll entrypoint for dumping hw state
Ander Conselvan de Oliveira
1
-0
/
+3
2016-12-30
drm/i915: Update kerneldoc for intel_dpll_mgr.c
Ander Conselvan de Oliveira
1
-15
/
+139
2016-12-30
drm/i915: Rename intel_shared_dpll->mode_set() to prepare()
Ander Conselvan de Oliveira
1
-2
/
+2
2016-12-30
drm/i915: Rename intel_shared_dpll_config to intel_shared_dpll_state
Ander Conselvan de Oliveira
1
-2
/
+2
2016-12-30
drm/i915: Rename intel_shared_dpll_commit() to _swap_state()
Ander Conselvan de Oliveira
1
-1
/
+1
2016-12-30
drm/i915: Introduce intel_release_shared_dpll()
Ander Conselvan de Oliveira
1
-8
/
+3
2016-09-10
drm/i915/dp: Add a standalone function to obtain shared dpll for HSW/BDW/SKL/BXT
Jim Bride
1
-0
/
+2
2016-09-07
drm/i915: Split hsw_get_dpll()
Manasi Navare
1
-0
/
+6
2016-09-07
drm/i915: Split skl_get_dpll()
Jim Bride
1
-0
/
+4
2016-09-07
drm/i915: Split bxt_ddi_pll_select()
Durgadoss R
1
-0
/
+3
2016-03-17
drm/i915: Use a crtc mask instead of a refcount for dpll functions, v2.
Maarten Lankhorst
1
-1
/
+1
2016-03-09
drm/i915: Make SKL/KBL DPLL0 managed by the shared dpll code
Ander Conselvan de Oliveira
1
-3
/
+4
2016-03-09
drm/i915: Manage HSW/BDW LCPLLs with the shared dpll interface
Ander Conselvan de Oliveira
1
-1
/
+11
2016-03-09
drm/i915: Move HSW/BDW pll selection logic to intel_dpll_mgr.c
Ander Conselvan de Oliveira
1
-2
/
+11
2016-03-09
drm/i915: Refactor platform specifics out of intel_get_shared_dpll()
Ander Conselvan de Oliveira
1
-0
/
+2
2016-03-09
drm/i915: Use a table to initilize shared dplls
Ander Conselvan de Oliveira
1
-8
/
+14
2016-03-09
drm/i915: Move shared dpll function prototypes to intel_dpll_mgr.h
Ander Conselvan de Oliveira
1
-0
/
+30
2016-03-09
drm/i915: Move shared dpll struct definitions to separate header file
Ander Conselvan de Oliveira
1
-0
/
+106