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author | Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> | 2016-12-29 18:22:12 +0300 |
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committer | Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> | 2016-12-30 10:32:34 +0300 |
commit | f50b79f096a7533e9b13638c06dfa759de070f56 (patch) | |
tree | 11a1c2b4eee497b59f9e6900cf8a4c0740ad95c9 /drivers/gpu/drm/i915/intel_dpll_mgr.h | |
parent | 294591cfbd2b185ac51fa2b1768a333fa6782011 (diff) | |
download | linux-f50b79f096a7533e9b13638c06dfa759de070f56.tar.xz |
drm/i915: Add dpll entrypoint for dumping hw state
Remove the IS_PLATFORM() macros from intel_dump_pipe_config() and split
that logic in platform specific implementations inside the dpll code,
accessed through a platform independent interface.
v2: Rebase.
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> (v1)
Link: http://patchwork.freedesktop.org/patch/msgid/1483024933-3726-7-git-send-email-ander.conselvan.de.oliveira@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dpll_mgr.h')
-rw-r--r-- | drivers/gpu/drm/i915/intel_dpll_mgr.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.h b/drivers/gpu/drm/i915/intel_dpll_mgr.h index db96eea00298..af1497eb4f9c 100644 --- a/drivers/gpu/drm/i915/intel_dpll_mgr.h +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.h @@ -279,6 +279,9 @@ void intel_disable_shared_dpll(struct intel_crtc *crtc); void intel_shared_dpll_swap_state(struct drm_atomic_state *state); void intel_shared_dpll_init(struct drm_device *dev); +void intel_dpll_dump_hw_state(struct drm_i915_private *dev_priv, + struct intel_dpll_hw_state *hw_state); + /* BXT dpll related functions */ bool bxt_ddi_dp_set_dpll_hw_state(int clock, struct intel_dpll_hw_state *dpll_hw_state); |