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path: root/drivers/cxl
AgeCommit message (Expand)AuthorFilesLines
2022-08-06cxl/hdm: Fix skip allocations vs multiple pmem allocationsDan Williams1-1/+10
2022-08-06cxl/region: Disallow region granularity != window granularityDan Williams1-6/+7
2022-08-06cxl/region: Fix x1 interleave to greater than x1 interleave routingDan Williams1-1/+5
2022-08-06cxl/region: Move HPA setup to cxl_region_attach()Dan Williams2-26/+24
2022-08-05cxl/region: Fix decoder interleave programmingDan Williams1-0/+3
2022-08-05cxl/region: describe targets and nr_targets members of cxl_region_paramsBagas Sanjaya1-0/+2
2022-08-05cxl/regions: add padding for cxl_rr_ep_add nested listsBagas Sanjaya1-0/+3
2022-08-05cxl/region: Fix IS_ERR() vs NULL checkDan Carpenter1-2/+2
2022-08-05cxl/region: Fix region reference target accountingDan Williams1-28/+43
2022-08-05cxl/region: Fix region commit uninitialized variable warningDan Williams1-17/+13
2022-08-05cxl/region: Fix port setup uninitialized variable warningsDan Williams1-3/+22
2022-08-02cxl/region: Stop initializing interleave granularityDan Williams1-4/+0
2022-08-02cxl/hdm: Fix DPA reservation vs cxl_endpoint_decoder lifetimeDan Williams1-2/+5
2022-08-02cxl/acpi: Minimize granularity for x1 interleavesDan Williams2-0/+8
2022-08-02cxl/region: Delete 'region' attribute from root decodersDan Williams1-1/+2
2022-08-02cxl/acpi: Autoload driver for 'cxl_acpi' test devicesDan Williams1-0/+7
2022-08-02cxl/region: decrement ->nr_targets on error in cxl_region_attach()Dan Carpenter1-1/+3
2022-08-01cxl/region: prevent underflow in ways_to_cxl()Dan Carpenter2-3/+4
2022-08-01cxl/region: uninitialized variable in alloc_hpa()Dan Carpenter1-1/+1
2022-07-26cxl/region: Introduce cxl_pmem_region objectsDan Williams6-5/+420
2022-07-26cxl/pmem: Fix offline_nvdimm_bus() to offline by bridgeDan Williams2-4/+18
2022-07-26cxl/region: Add region driver boiler plateDan Williams4-1/+66
2022-07-25cxl/hdm: Commit decoder state to hardwareDan Williams4-11/+424
2022-07-25cxl/region: Program target listsDan Williams4-11/+259
2022-07-25cxl/region: Attach endpoint decodersDan Williams5-12/+394
2022-07-25cxl/acpi: Add a host-bridge index lookup mechanismDan Williams2-0/+18
2022-07-25cxl/region: Enable the assignment of endpoint decoders to regionsDan Williams5-2/+321
2022-07-25cxl/region: Allocate HPA capacity to regionsDan Williams3-1/+154
2022-07-25cxl/region: Add interleave geometry attributesBen Widawsky2-0/+167
2022-07-25cxl/region: Add a 'uuid' attributeBen Widawsky2-0/+143
2022-07-22cxl/region: Add region creation supportBen Widawsky6-0/+274
2022-07-22cxl/mem: Enumerate port targets before adding endpointsDan Williams3-29/+47
2022-07-22cxl/hdm: Add sysfs attributes for interleave ways + granularityBen Widawsky1-0/+23
2022-07-22cxl/port: Move dport tracking to an xarrayDan Williams3-56/+47
2022-07-22cxl/port: Move 'cxl_ep' references to an xarray per portDan Williams2-34/+30
2022-07-22cxl/port: Record parent dport when adding portsDan Williams4-20/+27
2022-07-22cxl/port: Record dport in endpoint referencesDan Williams2-17/+37
2022-07-22cxl/hdm: Add support for allocating DPA to an endpoint decoderDan Williams3-1/+259
2022-07-22cxl/hdm: Track next decoder to allocateDan Williams3-0/+18
2022-07-22cxl/hdm: Add 'mode' attribute to decoder objectsDan Williams3-0/+39
2022-07-22cxl/hdm: Enumerate allocated DPADan Williams3-11/+149
2022-07-21cxl/core: Define a 'struct cxl_endpoint_decoder'Dan Williams3-14/+41
2022-07-21cxl/core: Define a 'struct cxl_root_decoder'Dan Williams3-13/+76
2022-07-21cxl/acpi: Track CXL resources in iomem_resourceDan Williams1-3/+141
2022-07-21cxl/core: Define a 'struct cxl_switch_decoder'Dan Williams4-84/+175
2022-07-20cxl/port: Read CDAT tableIra Weiny4-0/+234
2022-07-20cxl/pci: Create PCI DOE mailbox's for memory devicesIra Weiny3-0/+48
2022-07-11cxl/pmem: Delete unused nvdimm attributeDan Williams1-1/+0
2022-07-10cxl/hdm: Initialize decoder type for memory expander devicesDan Williams1-5/+11
2022-07-10cxl/port: Cache CXL host bridge dataDan Williams2-1/+19
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