index
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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
pinetabv-6.6.y-devel
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starfive-6.6.63-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
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drivers
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cxl
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2025-01-29
Merge tag 'cxl-for-6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl...
Linus Torvalds
6
-71
/
+264
2025-01-22
cxl/core/regs: Refactor out functions to count regblocks of given type
Huaisheng Ye
3
-24
/
+41
2025-01-13
cxl/events: Update Memory Module Event Record to CXL spec rev 3.1
Shiju Jose
1
-8
/
+54
2025-01-13
cxl/events: Update DRAM Event Record to CXL spec rev 3.1
Shiju Jose
1
-18
/
+54
2025-01-13
cxl/events: Update General Media Event Record to CXL spec rev 3.1
Shiju Jose
1
-12
/
+78
2025-01-13
cxl/events: Add Component Identifier formatting for CXL spec rev 3.1
Shiju Jose
1
-0
/
+22
2025-01-13
cxl/events: Update Common Event Record to CXL spec rev 3.1
Shiju Jose
1
-4
/
+9
2025-01-13
Merge 6.13-rc7 into driver-core-next
Greg Kroah-Hartman
2
-9
/
+22
2025-01-10
driver core: Correct API device_for_each_child_reverse_from() prototype
Zijun Hu
2
-2
/
+2
2025-01-03
cxl/pmem: Remove is_cxl_nvdimm_bridge()
Zijun Hu
2
-7
/
+0
2025-01-03
cxl/pmem: Replace match_nvdimm_bridge() with API device_match_type()
Zijun Hu
1
-6
/
+3
2025-01-03
driver core: Constify API device_find_child() and adapt for various usages
Zijun Hu
3
-12
/
+15
2025-01-02
cxl/pci: Add CXL Type 1/2 support to cxl_dvsec_rr_decode()
Alejandro Lucero
3
-5
/
+6
2024-12-11
cxl/region: Fix region creation for greater than x2 switches
Huaisheng Ye
1
-7
/
+18
2024-12-11
cxl/pci: Check dport->regs.rcd_pcie_cap availability before accessing
Li Ming
1
-0
/
+3
2024-12-11
cxl/pci: Fix potential bogus return value upon successful probing
Davidlohr Bueso
1
-2
/
+1
2024-12-02
module: Convert symbol namespace to string literal
Peter Zijlstra
16
-109
/
+109
2024-11-29
Merge tag 'driver-core-6.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds
1
-1
/
+1
2024-11-22
Merge tag 'cxl-for-6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl...
Linus Torvalds
7
-47
/
+193
2024-11-08
Merge branch 'cxl/for-6.13/dcd-prep' into cxl-for-next
Dave Jiang
3
-36
/
+21
2024-11-08
cxl/region: Refactor common create region code
Ira Weiny
1
-17
/
+11
2024-11-08
cxl/hdm: Use guard() in cxl_dpa_set_mode()
Ira Weiny
1
-15
/
+6
2024-11-08
cxl/pci: Delay event buffer allocation
Ira Weiny
1
-4
/
+4
2024-11-05
sysfs: treewide: constify attribute callback of bin_is_visible()
Thomas Weißschuh
1
-1
/
+1
2024-10-29
Merge branch 'cxl/for-6.12/printf' into cxl-for-next
Dave Jiang
1
-4
/
+4
2024-10-29
cxl/cdat: Use %pra for dpa range outputs
Ira Weiny
1
-4
/
+4
2024-10-28
cxl: downgrade a warning message to debug level in cxl_probe_component_regs()
Coly Li
1
-1
/
+1
2024-10-28
cxl/pci: Add sysfs attribute for CXL 1.1 device link status
Kobayashi,Daisuke
1
-0
/
+78
2024-10-28
cxl/core/regs: Add rcd_pcie_cap initialization
Kobayashi,Daisuke
4
-6
/
+89
2024-10-26
cxl/port: Prevent out-of-order decoder allocation
Dan Williams
1
-10
/
+33
2024-10-26
cxl/port: Fix use-after-free, permit out-of-order decoder shutdown
Dan Williams
3
-44
/
+57
2024-10-26
cxl/acpi: Ensure ports ready at cxl_acpi_probe() return
Dan Williams
1
-0
/
+7
2024-10-26
cxl/port: Fix cxl_bus_rescan() vs bus_rescan_devices()
Dan Williams
1
-3
/
+10
2024-10-26
cxl/port: Fix CXL port initialization order when the subsystem is built-in
Dan Williams
3
-7
/
+31
2024-10-25
cxl/events: Fix Trace DRAM Event Record
Shiju Jose
1
-3
/
+14
2024-10-25
cxl/core: Return error when cxl_endpoint_gather_bandwidth() handles a non-PCI...
Li Zhijian
1
-0
/
+3
2024-10-03
move asm/unaligned.h to linux/unaligned.h
Al Viro
5
-5
/
+5
2024-09-27
Merge tag 'cxl-for-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl...
Linus Torvalds
14
-381
/
+926
2024-09-23
cxl: Calculate region bandwidth of targets with shared upstream link
Dave Jiang
6
-10
/
+537
2024-09-23
cxl: Preserve the CDAT access_coordinate for an endpoint
Dave Jiang
2
-4
/
+8
2024-09-19
cxl: Fix comment regarding cxl_query_cmd() return data
Dave Jiang
1
-1
/
+1
2024-09-12
cxl: Convert cxl_internal_send_cmd() to use 'struct cxl_mailbox' as input
Dave Jiang
6
-44
/
+54
2024-09-12
cxl: Move mailbox related bits to the same context
Dave Jiang
5
-62
/
+116
2024-09-10
cxl: move cxl headers to new include/cxl/ directory
Dave Jiang
2
-2
/
+2
2024-09-09
cxl/region: Remove lock from memory notifier callback
Ira Weiny
1
-24
/
+30
2024-09-09
cxl/pci: simplify the check of mem_enabled in cxl_hdm_decode_init()
Yanfei Xu
1
-10
/
+11
2024-09-09
cxl/pci: Check Mem_info_valid bit for each applicable DVSEC
Yanfei Xu
1
-4
/
+4
2024-09-09
cxl/pci: Remove duplicated implementation of waiting for memory_info_valid
Yanfei Xu
3
-38
/
+7
2024-09-09
cxl/pci: Fix to record only non-zero ranges
Yanfei Xu
1
-7
/
+1
2024-09-04
mm: make range-to-target_node lookup facility a part of numa_memblks
Mike Rapoport (Microsoft)
1
-1
/
+1
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