index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
clk
/
sifive
/
sifive-prci.c
Age
Commit message (
Expand
)
Author
Files
Lines
2024-07-19
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...
Linus Torvalds
1
-0
/
+1
2024-06-04
clk: sifive: prci: fix module autoloading
Krzysztof Kozlowski
1
-0
/
+1
2024-05-29
clk: sifive: Do not register clkdevs for PRCI clocks
Samuel Holland
1
-8
/
+0
2023-10-24
clk: sifive: Allow building the driver as a module
Samuel Holland
1
-5
/
+5
2023-07-19
clk: Explicitly include correct DT includes
Rob Herring
1
-1
/
+1
2023-06-15
clk: sifive: Use devm_platform_ioremap_resource()
Yang Li
1
-3
/
+1
2022-03-16
clk: sifive: Move all stuff into SoCs header files from C files
Zong Li
1
-5
/
+0
2021-06-02
clk: sifive: Fix kernel-doc
Yang Li
1
-1
/
+1
2021-05-04
clk: sifive: Use reset-simple in prci driver for PCIe driver
Greentime Hu
1
-0
/
+13
2021-05-04
clk: sifive: Add pcie_aux clock in prci driver for PCIe driver
Greentime Hu
1
-0
/
+41
2021-02-11
clk: sifive: fu540-prci: Declare static const variable 'prci_clk_fu540' where...
Lee Jones
1
-0
/
+5
2020-12-16
clk: sifive: Add clock enable and disable ops
Pragnesh Patel
1
-9
/
+68
2020-12-16
clk: sifive: Add a driver for the SiFive FU740 PRCI IP block
Zong Li
1
-0
/
+120
2020-12-16
clk: sifive: Extract prci core to common base
Zong Li
1
-0
/
+395