| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2024-06-07 | clk: renesas: cpg-lib: Use DEFINE_SPINLOCK() for global spinlock | Geert Uytterhoeven | 1 | -1/+1 |
| 2023-10-05 | clk: renesas: rcar-gen3: Extend SDnH divider table | Dirk Behme | 1 | -1/+14 |
| 2021-11-19 | clk: renesas: rcar-gen3: Switch to new SD clock handling | Wolfram Sang | 1 | -193/+27 |
| 2021-11-19 | clk: renesas: rcar-gen3: Add dummy SDnH clock | Wolfram Sang | 1 | -0/+9 |
| 2021-10-08 | clk: renesas: cpg-lib: Move RPC clock registration to the library | Wolfram Sang | 1 | -0/+83 |
| 2021-03-30 | clk: renesas: Zero init clk_init_data | Geert Uytterhoeven | 1 | -1/+1 |
| 2021-01-12 | clk: renesas: rcar-gen3: Factor out CPG library | Wolfram Sang | 1 | -0/+270 |
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index : starfive-tech/linux.git | |
| StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror) | Andrey V.Kosteltsev |
| summaryrefslogtreecommitdiff |