starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2025-04-22	clk: renesas: r9a09g057: Add clock and reset entries for USB2	Lad Prabhakar	1	-1/+19
2025-04-08	clk: renesas: r9a09g057: Add clock and reset entries for GE3D	Lad Prabhakar	1	-0/+14
2025-04-08	clk: renesas: rzv2h: Refactor PLL configuration handling	Lad Prabhakar	1	-1/+1
2025-03-04	clk: renesas: r9a09g057: Add entries for the DMACs	Fabrizio Castro	1	-0/+24
2025-01-07	clk: renesas: r9a09g057: Add clock and reset entries for GIC	Lad Prabhakar	1	-0/+4
2025-01-07	clk: renesas: r9a09g057: Add reset entry for SYS	Lad Prabhakar	1	-0/+1
2025-01-07	clk: renesas: rzv2h: Add MSTOP support	Biju Das	1	-51/+104
2024-12-10	clk: renesas: r9a09g057: Add support for PLLVDO, CRU clocks, and resets	Lad Prabhakar	1	-0/+45
2024-10-07	clk: renesas: r9a09g057: Add clock and reset entries for ICU	Fabrizio Castro	1	-0/+2
2024-10-07	clk: renesas: r9a09g057: Add CA55 core clocks	Lad Prabhakar	1	-0/+16
2024-09-02	clk: renesas: r9a09g057: Add clock and reset entries for GTM/RIIC/SDHI/WDT	Lad Prabhakar	1	-0/+84
2024-08-20	clk: renesas: Add RZ/V2H(P) CPG driver	Lad Prabhakar	1	-0/+80