starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2023-08-15	clk: renesas: rcar-gen3: Add ADG clocks	Kuninori Morimoto	1	-0/+1
2023-03-06	clk: renesas: r8a77995: Fix VIN parent clock	Geert Uytterhoeven	1	-1/+1
2022-04-13	clk: renesas: Move RPC core clocks	Geert Uytterhoeven	1	-6/+4
2022-04-11	clk: renesas: r8a77995: Add RPC clocks	Geert Uytterhoeven	1	-0/+9
2022-01-24	clk: renesas: r8a7799[05]: Add MLP clocks	Nikita Yushchenko	1	-0/+1
2021-11-19	clk: renesas: rcar-gen3: Add SDnH clock	Wolfram Sang	1	-1/+2
2021-05-27	clk: renesas: r8a77995: Add ZA2 clock	Kuninori Morimoto	1	-0/+1
2020-12-28	clk: renesas: r8a77995: Add TMU clocks	Niklas Söderlund	1	-0/+5
2020-06-22	clk: renesas: rcar-gen3: Mark RWDT clocks as critical	Ulrich Hecht	1	-1/+1
2020-02-10	clk: renesas: rcar-gen3: Add CCREE clocks	Geert Uytterhoeven	1	-0/+2
2019-06-18	clk: renesas: r8a77995: Add CMM clocks	Jacopo Mondi	1	-0/+2
2019-04-02	clk: renesas: rcar-gen3: Correct parent clock of Audio-DMAC	Takeshi Kihara	1	-1/+1
2018-12-04	clk: renesas: r8a77995: Simplify PLL3 multiplier/divider	Geert Uytterhoeven	1	-2/+2
2018-12-04	clk: renesas: r8a77995: Add missing CPEX clock	Geert Uytterhoeven	1	-1/+2
2018-12-04	clk: renesas: r8a77995: Remove non-existent SSP clocks	Geert Uytterhoeven	1	-1/+0
2018-12-04	clk: renesas: r8a77995: Remove non-existent VIN5-7 module clocks	Geert Uytterhoeven	1	-3/+0
2018-12-04	clk: renesas: r8a77995: Correct parent clock of DU	Geert Uytterhoeven	1	-2/+2
2018-10-19	Merge branch 'clk-renesas' into clk-next	Stephen Boyd	1	-2/+10
2018-08-31	clk: renesas: use SPDX identifier for Renesas drivers	Wolfram Sang	1	-4/+1
2018-08-27	clk: renesas: r8a77995: Correct RCLK handling	Geert Uytterhoeven	1	-2/+10
2017-10-16	clk: renesas: r8a77995: Correct parent clock of INTC-AP	Geert Uytterhoeven	1	-1/+1
2017-08-16	clk: renesas: cpg-mssr: Add R8A77995 support	Geert Uytterhoeven	1	-0/+236