starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2023-01-13	clk: meson: clk-cpu-dyndiv: switch from .round_rate to .determine_rate	Martin Blumenstingl	1	-5/+4
2023-01-13	clk: meson: sclk-div: switch from .round_rate to .determine_rate	Martin Blumenstingl	1	-5/+6
2023-01-13	clk: meson: dualdiv: switch from .round_rate to .determine_rate	Martin Blumenstingl	1	-8/+13
2023-01-13	clk: meson: mpll: Switch from .round_rate to .determine_rate	Martin Blumenstingl	1	-7/+13
2022-12-12	Merge branches 'clk-bindings', 'clk-renesas', 'clk-amlogic', 'clk-allwinner' ...	Stephen Boyd	1	-8/+12
2022-11-23	clk: Remove a useless include	Christophe JAILLET	1	-1/+0
2022-11-08	clk: meson: pll: add pcie lock retry workaround	Heiner Kallweit	1	-4/+8
2022-11-08	clk: meson: pll: adjust timeout in meson_clk_pll_wait_lock()	Heiner Kallweit	1	-4/+4
2022-08-20	clk: meson: Hold reference returned by of_get_parent()	Liang He	3	-3/+12
2022-06-16	clk: meson: axg-audio: Don't duplicate devm_clk_get_enabled()	Uwe Kleine-König	1	-32/+4
2022-03-12	clk: cleanup comments	Tom Rix	1	-1/+1
2021-11-30	clk: meson: gxbb: Fix the SDM_EN bit for MPLL0 on GXBB	Martin Blumenstingl	1	-3/+41
2021-09-23	clk: meson: meson8b: Make the video clock trees mutable	Martin Blumenstingl	1	-38/+38
2021-09-23	clk: meson: meson8b: Initialize the HDMI PLL registers	Martin Blumenstingl	2	-5/+48
2021-09-23	clk: meson: meson8b: Add the HDMI PLL M/N parameters	Martin Blumenstingl	1	-0/+22
2021-09-23	clk: meson: meson8b: Add the vid_pll_lvds_en gate clock	Martin Blumenstingl	2	-2/+24
2021-09-23	clk: meson: meson8b: Use CLK_SET_RATE_NO_REPARENT for vclk{,2}_in_sel	Martin Blumenstingl	1	-2/+2
2021-09-23	clk: meson: meson8b: Export the video clocks	Martin Blumenstingl	1	-11/+1
2021-06-30	clk: meson: regmap: switch to determine_rate for the dividers	Martin Blumenstingl	1	-10/+9
2021-06-09	clk: meson: g12a: Add missing NNA source clocks for g12b	Nick Xie	1	-0/+6
2021-05-24	clk: meson: axg-audio: improve deferral handling	Jerome Brunet	1	-3/+2
2021-05-20	clk: meson: g12a: fix gp0 and hifi ranges	Jerome Brunet	1	-1/+1
2021-05-19	clk: meson: pll: switch to determine_rate for the PLL ops	Martin Blumenstingl	1	-11/+15
2021-02-09	clk: meson: axg: Remove MIPI enable clock gate	Remi Pommarel	2	-4/+0
2021-01-04	clk: meson: meson8b: remove compatibility code for old .dtbs	Martin Blumenstingl	1	-40/+5
2021-01-04	clk: meson: clk-pll: propagate the error from meson_clk_pll_set_rate()	Martin Blumenstingl	1	-2/+3
2021-01-04	clk: meson: clk-pll: make "ret" a signed integer	Martin Blumenstingl	1	-1/+2
2021-01-04	clk: meson: clk-pll: fix initializing the old rate (fallback) for a PLL	Martin Blumenstingl	1	-1/+1
2020-12-21	Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...	Linus Torvalds	11	-61/+1004
2020-11-26	clk: meson: g12a: add MIPI DSI Host Pixel Clock	Neil Armstrong	2	-1/+76
2020-11-23	clk: meson: enable building as modules	Kevin Hilman	9	-9/+34
2020-11-23	clk: meson: Kconfig: fix dependency for G12A	Kevin Hilman	1	-0/+1
2020-11-23	clk: meson: axg: add MIPI DSI Host clock	Neil Armstrong	2	-1/+69
2020-11-23	clk: meson: axg: add Video Clocks	Neil Armstrong	2	-1/+773
2020-11-14	clk: meson: g12: use devm variant to register notifiers	Jerome Brunet	1	-14/+20
2020-11-14	clk: meson: g12: drop use of __clk_lookup()	Jerome Brunet	1	-36/+32
2020-10-29	clk: define to_clk_regmap() as inline function	Arnd Bergmann	1	-1/+4
2020-10-20	Merge branches 'clk-semicolon', 'clk-axi-clkgen', 'clk-qoriq', 'clk-baikal', ...	Stephen Boyd	1	-1/+1
2020-10-14	clk: meson: use semicolons rather than commas to separate statements	Julia Lawall	1	-1/+1
2020-09-10	clk: meson: make shipped controller configurable	Jerome Brunet	1	-9/+17
2020-08-29	clk: meson: g12a: mark fclk_div2 as critical	Stefan Agner	1	-0/+11
2020-08-17	clk: meson: axg-audio: fix g12a tdmout sclk inverter	Jerome Brunet	1	-25/+60
2020-08-17	clk: meson: axg-audio: separate axg and g12a regmap tables	Jerome Brunet	1	-8/+127
2020-08-17	clk: meson: add sclk-ws driver	Jerome Brunet	2	-0/+62
2020-07-21	Merge branch 'clk-amlogic' into clk-next	Stephen Boyd	4	-19/+178
2020-07-11	Replace HTTP links with HTTPS ones: Common CLK framework	Alexander A. Klimov	1	-1/+1
2020-07-09	clk: meson: meson8b: add the vclk2_en gate clock	Martin Blumenstingl	2	-6/+27
2020-07-09	clk: meson: meson8b: add the vclk_en gate clock	Martin Blumenstingl	2	-6/+27
2020-06-24	clk: meson: meson8b: Drop CLK_IS_CRITICAL from fclk_div2	Martin Blumenstingl	1	-7/+0
2020-06-19	clk: meson: g12a: Add support for NNA CLK source clocks	Dmitry Shmidt	2	-1/+125