summaryrefslogtreecommitdiff
path: root/drivers/clk/meson
AgeCommit message (Expand)AuthorFilesLines
2025-05-15clk: meson: Do not enable by default during compile testingKrzysztof Kozlowski1-8/+8
2025-05-15clk: meson-g12a: add missing fclk_div2 to spiccDa Xue1-0/+1
2025-03-14clk: amlogic: a1: fix a typoJian Hu1-1/+1
2025-03-14clk: amlogic: gxbb: drop non existing 32k clock parentJerome Brunet1-6/+6
2025-03-14clk: amlogic: gxbb: drop incorrect flag on 32k clockJerome Brunet1-1/+1
2025-03-14clk: amlogic: g12b: fix cluster A parent dataJerome Brunet1-12/+24
2025-03-14clk: amlogic: g12a: fix mmc A peripheral clockJerome Brunet1-1/+1
2024-12-11Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/...Linus Torvalds2-10/+101
2024-12-03clk: amlogic: axg-audio: revert reset implementationJerome Brunet2-10/+101
2024-12-02module: Convert symbol namespace to string literalPeter Zijlstra25-49/+49
2024-11-14clk: amlogic: axg-audio: fix Kconfig dependency on RESET_MESON_AUXArnd Bergmann1-1/+1
2024-10-14clk: amlogic: axg-audio: use the auxiliary reset driverJerome Brunet2-100/+10
2024-09-30clk: meson: meson8b: remove spinlockJerome Brunet1-7/+0
2024-09-30clk: meson: mpll: Delete a useless spinlock from the MPLLChuan Liu7-39/+0
2024-09-30clk: meson: s4: pll: fix frac maximum value for hifi_pllChuan Liu1-0/+1
2024-09-30clk: meson: c3: pll: fix frac maximum value for hifi_pllChuan Liu1-0/+1
2024-09-30clk: meson: Support PLL with fixed fractional denominatorsChuan Liu2-3/+6
2024-09-30clk: meson: s4: pll: hifi_pll support fractional multiplierChuan Liu1-1/+5
2024-07-29clk: meson: introduce symbol namespace for amlogic clocksJerome Brunet25-25/+49
2024-07-29clk: meson: axg-audio: add sm1 earcrx clocksJerome Brunet2-1/+33
2024-07-29clk: meson: axg-audio: setup regmap max_register based on the SoCJerome Brunet1-2/+6
2024-07-10clk: meson: s4: pll: Constify struct regmap_configJavier Carrasco1-1/+1
2024-07-10clk: meson: s4: peripherals: Constify struct regmap_configJavier Carrasco1-1/+1
2024-07-10clk: meson: c3: pll: Constify struct regmap_configJavier Carrasco1-1/+1
2024-07-10clk: meson: c3: peripherals: Constify struct regmap_configJavier Carrasco1-1/+1
2024-07-10clk: meson: a1: pll: Constify struct regmap_configJavier Carrasco1-1/+1
2024-07-10clk: meson: a1: peripherals: Constify struct regmap_configJavier Carrasco1-1/+1
2024-06-14clk: meson: add missing MODULE_DESCRIPTION() macrosJerome Brunet15-11/+29
2024-06-10clk: meson: add 'NOINIT_ENABLED' flag to eliminate init for enabled PLLDmitry Rokosov2-16/+25
2024-06-04clk: meson: c3: add c3 clock peripherals controller driverXianwei Zhao3-0/+2380
2024-06-04clk: meson: c3: add support for the C3 SoC PLL clockXianwei Zhao3-0/+760
2024-06-03clk: meson: s4: fix pwm_j_div parent clockXianwei Zhao1-1/+1
2024-06-03clk: meson: s4: fix fixed_pll_dco clockXianwei Zhao1-0/+5
2024-05-03clk: meson: s4: fix module autoloadingKrzysztof Kozlowski2-0/+2
2024-04-10clk: meson: fix module license to GPL onlyNeil Armstrong18-18/+18
2024-04-10clk: meson: g12a: make VCLK2 and ENCL clock path configurable by CCFNeil Armstrong2-20/+57
2024-04-10clk: meson: add vclk driverNeil Armstrong4-0/+197
2024-03-29clk: meson: pll: print out pll name when unable to lock itDmitry Rokosov1-2/+2
2024-03-29clk: meson: s4: pll: determine maximum register in regmap configDmitry Rokosov1-0/+1
2024-03-29clk: meson: s4: peripherals: determine maximum register in regmap configDmitry Rokosov1-0/+1
2024-03-29clk: meson: a1: pll: determine maximum register in regmap configDmitry Rokosov1-0/+1
2024-03-29clk: meson: a1: peripherals: determine maximum register in regmap configDmitry Rokosov1-0/+1
2024-02-05clk: meson: Add missing clocks to axg_clk_regmapsIgor Prusov1-0/+2
2023-11-24clk: meson: g12a: add CSI & ISP gates clocksNeil Armstrong1-0/+9
2023-11-24clk: meson: g12a: add MIPI ISP clocksNeil Armstrong2-0/+67
2023-11-24clk: meson: g12a: add CTS_ENCL & CTS_ENCL_SEL clocksNeil Armstrong1-0/+40
2023-10-23clk: meson: S4: select CONFIG_COMMON_CLK_MESON_CLKC_UTILSArnd Bergmann1-0/+2
2023-09-27clk: meson: S4: add support for Amlogic S4 SoC peripheral clock controllerYu Tu4-0/+3881
2023-09-27clk: meson: S4: add support for Amlogic S4 SoC PLL clock driverYu Tu4-0/+918
2023-08-31Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds28-3287/+2727