index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
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tree
commit
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log msg
author
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path:
root
/
drivers
/
clk
/
meson
/
Kconfig
Age
Commit message (
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)
Author
Files
Lines
2020-11-23
clk: meson: enable building as modules
Kevin Hilman
1
-3
/
+3
2020-11-23
clk: meson: Kconfig: fix dependency for G12A
Kevin Hilman
1
-0
/
+1
2020-09-10
clk: meson: make shipped controller configurable
Jerome Brunet
1
-9
/
+17
2019-08-09
clk: meson: add g12a cpu dynamic divider driver
Neil Armstrong
1
-0
/
+5
2019-07-29
clk: meson: remove clk input helper
Alexandre Mergnat
1
-3
/
+0
2019-07-29
clk: meson: remove ee input bypass clocks
Alexandre Mergnat
1
-1
/
+0
2019-07-29
clk: meson: remove ao input bypass clocks
Alexandre Mergnat
1
-1
/
+0
2019-07-29
clk: meson: axg-audio: migrate to the new parent description method
Alexandre Mergnat
1
-1
/
+0
2019-05-21
treewide: Add SPDX license identifier - Makefile/Kconfig
Thomas Gleixner
1
-0
/
+1
2019-02-13
clk: meson: Add G12A AO Clock + Reset Controller
Neil Armstrong
1
-0
/
+2
2019-02-04
clk: meson: factorise meson64 peripheral clock controller drivers
Jerome Brunet
1
-3
/
+8
2019-02-04
clk: meson: g12a: add peripheral clock controller
Jian Hu
1
-0
/
+12
2019-02-02
clk: meson: rework and clean drivers dependencies
Jerome Brunet
1
-24
/
+58
2019-02-02
clk: meson: axg-audio does not require syscon
Jerome Brunet
1
-1
/
+1
2018-07-09
clk: meson: axg: add the audio clock controller driver
Jerome Brunet
1
-0
/
+9
2018-07-09
clk: meson: add triple phase clock driver
Jerome Brunet
1
-0
/
+5
2018-07-09
clk: meson: clean-up meson clock configuration
Jerome Brunet
1
-9
/
+5
2018-05-15
clk: meson-axg: Add AO Clock and Reset controller driver
Qiufang Dai
1
-0
/
+1
2018-05-15
clk: meson: aoclk: refactor common code into dedicated file
Yixun Lan
1
-0
/
+7
2018-03-13
clk: meson: use hhi syscon if available
Jerome Brunet
1
-0
/
+2
2018-03-13
clk: meson: migrate gates to clk_regmap
Jerome Brunet
1
-2
/
+2
2018-03-13
clk: meson: add regmap to the clock controllers
Jerome Brunet
1
-0
/
+2
2018-03-13
clk: meson: switch gxbb ao_clk to clk_regmap
Jerome Brunet
1
-0
/
+1
2018-03-13
clk: meson: add regmap clocks
Jerome Brunet
1
-0
/
+4
2017-12-14
clk: meson-axg: add clock controller drivers
Qiufang Dai
1
-0
/
+8
2017-08-04
clk: meson: meson8b: register the built-in reset controller
Martin Blumenstingl
1
-0
/
+1
2017-06-17
Merge tag 'meson-clk-for-4.13-2' of git://github.com/BayLibre/clk-meson into ...
Stephen Boyd
1
-3
/
+3
2017-06-12
clk: meson: meson8b: add compatibles for Meson8 and Meson8m2
Martin Blumenstingl
1
-3
/
+3
2017-05-16
clk: meson: gxbb: fix build error without RESET_CONTROLLER
Tobias Regnery
1
-0
/
+1
2016-06-23
clk: gxbb: add AmLogic GXBB clk controller driver
Michael Turquette
1
-0
/
+7
2016-06-23
clk: meson: only build selected platforms
Michael Turquette
1
-0
/
+12