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path: root/drivers/clk/mediatek/clk-mt7622.c
AgeCommit message (Expand)AuthorFilesLines
2024-09-22clk: Switch back to struct platform_driver::remove()Uwe Kleine-König1-1/+1
2023-07-19clk: Explicitly include correct DT includesRob Herring1-3/+1
2023-05-10clk: mediatek: Make mtk_clk_simple_remove() return voidUwe Kleine-König1-1/+1
2023-03-13clk: mediatek: Add MODULE_DEVICE_TABLE() where appropriateAngeloGioacchino Del Regno1-0/+1
2023-03-13clk: mediatek: mt7622: Convert to platform driver and simple probeAngeloGioacchino Del Regno1-94/+31
2023-03-13clk: mediatek: mt7622: Move infracfg to clk-mt7622-infracfg.cAngeloGioacchino Del Regno1-73/+5
2023-03-13clk: mediatek: mt7622: Move apmixedsys clock driver to its own fileAngeloGioacchino Del Regno1-87/+0
2023-03-13clk: mediatek: mt7622: Properly use CLK_IS_CRITICAL flagAngeloGioacchino Del Regno1-20/+15
2023-03-13clk: mediatek: Consistently use GATE_MTK() macroAngeloGioacchino Del Regno1-48/+13
2023-01-31clk: mediatek: clk-mtk: Propagate struct device for compositesAngeloGioacchino Del Regno1-3/+5
2023-01-31clk: mediatek: cpumux: Propagate struct device where possibleAngeloGioacchino Del Regno1-2/+2
2023-01-31clk: mediatek: clk-gate: Propagate struct device with mtk_clk_register_gates()AngeloGioacchino Del Regno1-7/+7
2022-06-16clk: mediatek: reset: Add new register reset function with deviceRex-BC Chen1-2/+2
2022-06-16clk: mediatek: reset: Support nonsequence base offsets of reset registersRex-BC Chen1-4/+7
2022-06-16clk: mediatek: reset: Revise structure to control reset registerRex-BC Chen1-2/+17
2022-06-16clk: mediatek: reset: Merge and revise reset register functionRex-BC Chen1-2/+2
2022-05-20clk: mediatek: Replace 'struct clk' with 'struct clk_hw'Chen-Yu Tsai1-15/+15
2022-05-19clk: mediatek: use en_mask as a pure div_en_maskChun-Jie Chen1-9/+9
2022-02-17clk: mediatek: pll: Split definitions into separate header fileChen-Yu Tsai1-2/+3
2019-10-17clk: mediatek: mt7622: use devm_platform_ioremap_resource() to simplify codeYueHaibing1-4/+2
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174Thomas Gleixner1-9/+1
2018-11-30clk: mediatek: Drop more __init markings for driver probeStephen Boyd1-2/+2
2017-11-02clk: mediatek: add clock support for MT7622 SoCSean Wang1-0/+780