| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2022-02-25 | ARM: dts: stm32: Add CM4 reserved memory, rproc and IPCC on DHCOR SoM | Marek Vasut | 1 | -0/+56 |
| 2021-10-15 | ARM: dts: stm32: Reduce DHCOR SPI NOR frequency to 50 MHz | Marek Vasut | 1 | -1/+1 |
| 2021-06-10 | ARM: dts: stm32: Rename spi-flash/mx66l51235l@N to flash@N on DHCOM SoM | Marek Vasut | 1 | -1/+1 |
| 2021-04-01 | ARM: dts: stm32: Enable crc1 and cryp1 where applicable on DHSOM | Marek Vasut | 1 | -0/+4 |
| 2020-11-09 | ARM: dts: stm32: Enable thermal sensor support on stm32mp15xx-dhcor | Marek Vasut | 1 | -0/+4 |
| 2020-05-14 | ARM: dts: stm32: Split Avenger96 into DHCOR SoM and Avenger96 board | Marek Vasut | 1 | -0/+209 |
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index : starfive-tech/linux.git | |
| StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror) | Andrey V.Kosteltsev |
| summaryrefslogtreecommitdiff |