diff options
| author | Marek Vasut <marex@denx.de> | 2022-01-11 05:48:02 +0300 |
|---|---|---|
| committer | Alexandre Torgue <alexandre.torgue@foss.st.com> | 2022-02-25 12:53:15 +0300 |
| commit | 1deab7ed164fc4df348dd0401d34d2ff5b48edd5 (patch) | |
| tree | eec5d10185b1cda8b32f031fd556fc5fff3f1d8d /arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi | |
| parent | 26c1d8c7fe90d80f6c85bbd8c59ce7bebaf33b00 (diff) | |
| download | linux-1deab7ed164fc4df348dd0401d34d2ff5b48edd5.tar.xz | |
ARM: dts: stm32: Add CM4 reserved memory, rproc and IPCC on DHCOR SoM
Add reserved memory nodes for CortexM4 on the STM32MP1 DHCOR SoM, enable
rproc to control the CM4 and IPCC mailbox to interact with it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Diffstat (limited to 'arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi b/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi index 44ecc4708587..6336c3ca0f0e 100644 --- a/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi +++ b/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi @@ -19,6 +19,48 @@ device_type = "memory"; reg = <0xc0000000 0x40000000>; }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + mcuram2: mcuram2@10000000 { + compatible = "shared-dma-pool"; + reg = <0x10000000 0x40000>; + no-map; + }; + + vdev0vring0: vdev0vring0@10040000 { + compatible = "shared-dma-pool"; + reg = <0x10040000 0x1000>; + no-map; + }; + + vdev0vring1: vdev0vring1@10041000 { + compatible = "shared-dma-pool"; + reg = <0x10041000 0x1000>; + no-map; + }; + + vdev0buffer: vdev0buffer@10042000 { + compatible = "shared-dma-pool"; + reg = <0x10042000 0x4000>; + no-map; + }; + + mcuram: mcuram@30000000 { + compatible = "shared-dma-pool"; + reg = <0x30000000 0x40000>; + no-map; + }; + + retram: retram@38000000 { + compatible = "shared-dma-pool"; + reg = <0x38000000 0x10000>; + no-map; + }; + }; }; &crc1 { @@ -179,11 +221,25 @@ }; }; +&ipcc { + status = "okay"; +}; + &iwdg2 { timeout-sec = <32>; status = "okay"; }; +&m4_rproc { + memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, + <&vdev0vring1>, <&vdev0buffer>; + mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; + mbox-names = "vq0", "vq1", "shutdown"; + interrupt-parent = <&exti>; + interrupts = <68 1>; + status = "okay"; +}; + &pwr_regulators { vdd-supply = <&vdd>; vdd_3v3_usbfs-supply = <&vdd_usb>; |