diff options
Diffstat (limited to 'arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi | 16 |
1 files changed, 6 insertions, 10 deletions
diff --git a/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi index 56415ab34083..f77542fb3d4f 100644 --- a/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi @@ -47,13 +47,12 @@ device_type = "cpu"; compatible = "arm,cortex-a7"; enable-method = "qcom,kpss-acc-v2"; - next-level-cache = <&L2>; + next-level-cache = <&l2>; qcom,acc = <&acc0>; qcom,saw = <&saw0>; reg = <0x0>; clocks = <&gcc GCC_APPS_CLK_SRC>; clock-frequency = <0>; - clock-latency = <256000>; operating-points-v2 = <&cpu0_opp_table>; }; @@ -61,13 +60,12 @@ device_type = "cpu"; compatible = "arm,cortex-a7"; enable-method = "qcom,kpss-acc-v2"; - next-level-cache = <&L2>; + next-level-cache = <&l2>; qcom,acc = <&acc1>; qcom,saw = <&saw1>; reg = <0x1>; clocks = <&gcc GCC_APPS_CLK_SRC>; clock-frequency = <0>; - clock-latency = <256000>; operating-points-v2 = <&cpu0_opp_table>; }; @@ -75,13 +73,12 @@ device_type = "cpu"; compatible = "arm,cortex-a7"; enable-method = "qcom,kpss-acc-v2"; - next-level-cache = <&L2>; + next-level-cache = <&l2>; qcom,acc = <&acc2>; qcom,saw = <&saw2>; reg = <0x2>; clocks = <&gcc GCC_APPS_CLK_SRC>; clock-frequency = <0>; - clock-latency = <256000>; operating-points-v2 = <&cpu0_opp_table>; }; @@ -89,17 +86,16 @@ device_type = "cpu"; compatible = "arm,cortex-a7"; enable-method = "qcom,kpss-acc-v2"; - next-level-cache = <&L2>; + next-level-cache = <&l2>; qcom,acc = <&acc3>; qcom,saw = <&saw3>; reg = <0x3>; clocks = <&gcc GCC_APPS_CLK_SRC>; clock-frequency = <0>; - clock-latency = <256000>; operating-points-v2 = <&cpu0_opp_table>; }; - L2: l2-cache { + l2: l2-cache { compatible = "cache"; cache-level = <2>; cache-unified; @@ -126,7 +122,7 @@ opp-716000000 { opp-hz = /bits/ 64 <716000000>; clock-latency-ns = <256000>; - }; + }; }; memory { |