diff options
Diffstat (limited to 'Documentation/devicetree/bindings/serial')
| -rw-r--r-- | Documentation/devicetree/bindings/serial/fsl-imx-uart.txt | 4 | ||||
| -rw-r--r-- | Documentation/devicetree/bindings/serial/fsl-lpuart.txt | 10 |
2 files changed, 10 insertions, 4 deletions
diff --git a/Documentation/devicetree/bindings/serial/fsl-imx-uart.txt b/Documentation/devicetree/bindings/serial/fsl-imx-uart.txt index 35957cbf1571..c8d677f9491f 100644 --- a/Documentation/devicetree/bindings/serial/fsl-imx-uart.txt +++ b/Documentation/devicetree/bindings/serial/fsl-imx-uart.txt @@ -8,6 +8,10 @@ Required properties: Optional properties: - fsl,dte-mode : Indicate the uart works in DTE mode. The uart works in DCE mode by default. +- fsl,inverted-tx , fsl,inverted-rx : Indicate that the hardware attached + to the peripheral inverts the signal transmitted or received, + respectively, and that the peripheral should invert its output/input + using the INVT/INVR registers. - rs485-rts-delay, rs485-rts-active-low, rs485-rx-during-tx, linux,rs485-enabled-at-boot-time: see rs485.txt. Note that for RS485 you must enable either the "uart-has-rtscts" or the "rts-gpios" diff --git a/Documentation/devicetree/bindings/serial/fsl-lpuart.txt b/Documentation/devicetree/bindings/serial/fsl-lpuart.txt index c904e2e68332..e7448b92dd9d 100644 --- a/Documentation/devicetree/bindings/serial/fsl-lpuart.txt +++ b/Documentation/devicetree/bindings/serial/fsl-lpuart.txt @@ -6,6 +6,8 @@ Required properties: on Vybrid vf610 SoC with 8-bit register organization - "fsl,ls1021a-lpuart" for lpuart compatible with the one integrated on LS1021A SoC with 32-bit big-endian register organization + - "fsl,ls1028a-lpuart" for lpuart compatible with the one integrated + on LS1028A SoC with 32-bit little-endian register organization - "fsl,imx7ulp-lpuart" for lpuart compatible with the one integrated on i.MX7ULP SoC with 32-bit little-endian register organization - "fsl,imx8qxp-lpuart" for lpuart compatible with the one integrated @@ -15,10 +17,10 @@ Required properties: - reg : Address and length of the register set for the device - interrupts : Should contain uart interrupt - clocks : phandle + clock specifier pairs, one for each entry in clock-names -- clock-names : For vf610/ls1021a/imx7ulp, "ipg" clock is for uart bus/baud - clock. For imx8qxp lpuart, "ipg" clock is bus clock that is used to access - lpuart controller registers, it also requires "baud" clock for module to - receive/transmit data. +- clock-names : For vf610/ls1021a/ls1028a/imx7ulp, "ipg" clock is for uart + bus/baud clock. For imx8qxp lpuart, "ipg" clock is bus clock that is used + to access lpuart controller registers, it also requires "baud" clock for + module to receive/transmit data. Optional properties: - dmas: A list of two dma specifiers, one for each entry in dma-names. |