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authorVille Syrjälä <ville.syrjala@linux.intel.com>2024-06-24 22:10:27 +0300
committerVille Syrjälä <ville.syrjala@linux.intel.com>2024-08-29 14:54:03 +0300
commit2039809783d630c1022bb3debe648abced7861c4 (patch)
tree9f8a666ad0712b6119cc699d0f0e51a543adffca /drivers/gpu/drm/i915/display/intel_dsb.c
parent8d5ac8efb6d94efda53f604fd9c072b4754a3d85 (diff)
downloadlinux-2039809783d630c1022bb3debe648abced7861c4.tar.xz
drm/i915/dsb: Introduce intel_dsb_wait_scanline_{in,out}()
Add functions to emit a DSB scanline window wait instructions. We can either wait for the scanline to be IN the window or OUT of the window. The hardware doesn't handle wraparound so we must manually deal with it by swapping the IN range to the inverse OUT range, or vice versa. Also add a bit of paranoia to catch the edge case of waiting for the entire frame. That doesn't make sense since an IN wait would be a nop, and an OUT wait would imply waiting forever. Most of the time this also results in both scanline ranges (original and inverted) to have lower=upper+1 which is nonsense from the hw POV. For now we are only handling the case where the scanline wait happens prior to latching the double buffered registers during the commit (which might change the timings due to LRR/VRR/etc.) Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240624191032.27333-10-ville.syrjala@linux.intel.com Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dsb.c')
-rw-r--r--drivers/gpu/drm/i915/display/intel_dsb.c73
1 files changed, 73 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c
index 779ba7eb8042..9fd0a40ab540 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.c
+++ b/drivers/gpu/drm/i915/display/intel_dsb.c
@@ -362,6 +362,79 @@ void intel_dsb_nonpost_end(struct intel_dsb *dsb)
intel_dsb_noop(dsb, 4);
}
+static void intel_dsb_emit_wait_dsl(struct intel_dsb *dsb,
+ u32 opcode, int lower, int upper)
+{
+ u64 window = ((u64)upper << DSB_SCANLINE_UPPER_SHIFT) |
+ ((u64)lower << DSB_SCANLINE_LOWER_SHIFT);
+
+ intel_dsb_emit(dsb, lower_32_bits(window),
+ (opcode << DSB_OPCODE_SHIFT) |
+ upper_32_bits(window));
+}
+
+static void intel_dsb_wait_dsl(struct intel_atomic_state *state,
+ struct intel_dsb *dsb,
+ int lower_in, int upper_in,
+ int lower_out, int upper_out)
+{
+ struct intel_crtc *crtc = dsb->crtc;
+
+ lower_in = dsb_scanline_to_hw(state, crtc, lower_in);
+ upper_in = dsb_scanline_to_hw(state, crtc, upper_in);
+
+ lower_out = dsb_scanline_to_hw(state, crtc, lower_out);
+ upper_out = dsb_scanline_to_hw(state, crtc, upper_out);
+
+ if (upper_in >= lower_in)
+ intel_dsb_emit_wait_dsl(dsb, DSB_OPCODE_WAIT_DSL_IN,
+ lower_in, upper_in);
+ else if (upper_out >= lower_out)
+ intel_dsb_emit_wait_dsl(dsb, DSB_OPCODE_WAIT_DSL_OUT,
+ lower_out, upper_out);
+ else
+ drm_WARN_ON(crtc->base.dev, 1); /* assert_dsl_ok() should have caught it already */
+}
+
+static void assert_dsl_ok(struct intel_atomic_state *state,
+ struct intel_dsb *dsb,
+ int start, int end)
+{
+ struct intel_crtc *crtc = dsb->crtc;
+ int vtotal = dsb_vtotal(state, crtc);
+
+ /*
+ * Waiting for the entire frame doesn't make sense,
+ * (IN==don't wait, OUT=wait forever).
+ */
+ drm_WARN(crtc->base.dev, (end - start + vtotal) % vtotal == vtotal - 1,
+ "[CRTC:%d:%s] DSB %d bad scanline window wait: %d-%d (vt=%d)\n",
+ crtc->base.base.id, crtc->base.name, dsb->id,
+ start, end, vtotal);
+}
+
+void intel_dsb_wait_scanline_in(struct intel_atomic_state *state,
+ struct intel_dsb *dsb,
+ int start, int end)
+{
+ assert_dsl_ok(state, dsb, start, end);
+
+ intel_dsb_wait_dsl(state, dsb,
+ start, end,
+ end + 1, start - 1);
+}
+
+void intel_dsb_wait_scanline_out(struct intel_atomic_state *state,
+ struct intel_dsb *dsb,
+ int start, int end)
+{
+ assert_dsl_ok(state, dsb, start, end);
+
+ intel_dsb_wait_dsl(state, dsb,
+ end + 1, start - 1,
+ start, end);
+}
+
static void intel_dsb_align_tail(struct intel_dsb *dsb)
{
u32 aligned_tail, tail;