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authorSricharan R <sricharan@codeaurora.org>2016-11-18 15:28:27 +0300
committerStephen Boyd <sboyd@codeaurora.org>2016-11-24 03:41:19 +0300
commit96893e101eb294bced8358fbd48cbac175977aa4 (patch)
tree12ecc8cb20fb5b8e9e99177b75604b85c0ed530a /drivers/clk
parent904bb4f5c7de2f40ff31d43d3547d40910e46640 (diff)
downloadlinux-96893e101eb294bced8358fbd48cbac175977aa4.tar.xz
clk: qcom: Put venus core0/1 gdscs to hw control mode
The venus video ip's internal core blocks are under the control of the firmware and their powerdomains needs to be 'ON' only when used by the firmware. So putting it into hw controlled mode lets this to happen, otherwise the firmware hangs checking for this. Signed-off-by: Sricharan R <sricharan@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/qcom/mmcc-msm8996.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clk/qcom/mmcc-msm8996.c b/drivers/clk/qcom/mmcc-msm8996.c
index f77206f549cc..9b97246287a7 100644
--- a/drivers/clk/qcom/mmcc-msm8996.c
+++ b/drivers/clk/qcom/mmcc-msm8996.c
@@ -2945,6 +2945,7 @@ static struct gdsc venus_core0_gdsc = {
.name = "venus_core0",
},
.pwrsts = PWRSTS_OFF_ON,
+ .flags = HW_CTRL,
};
static struct gdsc venus_core1_gdsc = {
@@ -2955,6 +2956,7 @@ static struct gdsc venus_core1_gdsc = {
.name = "venus_core1",
},
.pwrsts = PWRSTS_OFF_ON,
+ .flags = HW_CTRL,
};
static struct gdsc camss_gdsc = {