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path: root/drivers/pci/controller
AgeCommit message (Expand)AuthorFilesLines
6 daysMerge tag 'pci-v7.1-changes' of git://git.kernel.org/pub/scm/linux/kernel/git...Linus Torvalds39-1164/+1667
8 daysMerge tag 'acpi-7.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/raf...Linus Torvalds1-11/+1
8 daysMerge branch 'pci/controller/rzg3s-host'Bjorn Helgaas1-80/+285
8 daysMerge branch 'pci/controller/mediatek-gen3'Bjorn Helgaas2-99/+133
8 daysMerge branch 'pci/controller/mediatek'Bjorn Helgaas1-1/+1
8 daysMerge branch 'pci/controller/dwc-tegra194'Bjorn Helgaas3-103/+158
8 daysMerge branch 'pci/controller/dwc-rockchip'Bjorn Helgaas1-0/+111
8 daysMerge branch 'pci/controller/dwc-rcar-gen4-ep'Bjorn Helgaas1-1/+3
8 daysMerge branch 'pci/controller/dwc-qcom'Bjorn Helgaas1-6/+11
8 daysMerge branch 'pci/controller/dwc-layerscape'Bjorn Helgaas2-2/+16
8 daysMerge branch 'pci/controller/dwc-imx6'Bjorn Helgaas3-27/+35
8 daysMerge branch 'pci/controller/dwc-eswin'Bjorn Helgaas3-0/+419
8 daysMerge branch 'pci/controller/dwc-andes-qilai'Bjorn Helgaas3-0/+209
8 daysMerge branch 'pci/controller/dwc-amd-mdb'Bjorn Helgaas1-1/+1
8 daysMerge branch 'pci/controller/dwc'Bjorn Helgaas6-673/+111
8 daysMerge branch 'pci/controller/cadence-sky1'Bjorn Helgaas1-2/+4
8 daysMerge branch 'pci/controller/cadence-sg2042'Bjorn Helgaas3-0/+28
8 daysMerge branch 'pci/controller/cadence'Bjorn Helgaas1-31/+25
8 daysMerge branch 'pci/controller/aspeed'Bjorn Helgaas1-4/+4
8 daysMerge branch 'pci/controller/max-link-speed'Bjorn Helgaas10-14/+16
8 daysMerge branch 'pci/endpoint'Bjorn Helgaas15-123/+100
12 daysPCI: sg2042: Avoid L0s and L1 on Sophgo 2042 PCIe Root PortsYao Zi1-0/+2
12 daysPCI: cadence: Add flags for disabling ASPM capability for broken Root PortsYao Zi2-0/+26
13 daysPCI: tegra194: Add core monitor clock supportVidya Sagar1-0/+16
13 daysPCI: tegra194: Enable hardware hot reset mode in Endpoint modeVidya Sagar1-0/+2
13 daysPCI: tegra194: Enable DMA interruptVidya Sagar1-0/+18
13 daysPCI: tegra194: Remove IRQF_ONESHOT flag during Endpoint interrupt registrationVidya Sagar1-1/+1
13 daysPCI: tegra194: Calibrate pipe to UPHY for Endpoint modeVidya Sagar1-0/+3
13 daysPCI: tegra194: Assert CLKREQ# explicitly by defaultVidya Sagar1-0/+2
13 daysPCI: tegra194: Fix CBB timeout caused by DBI access before core power-onManikanta Maddireddy1-4/+4
13 daysPCI: tegra194: Disable L1.2 capability of Tegra234 EPVidya Sagar1-0/+19
13 daysPCI: dwc: Apply ECRC workaround to DesignWare 5.00a as wellManikanta Maddireddy1-8/+8
13 daysPCI: tegra194: Use DWC IP core versionManikanta Maddireddy2-2/+4
13 daysPCI: tegra194: Free up Endpoint resources during remove()Vidya Sagar1-0/+2
13 daysPCI: tegra194: Allow system suspend when the Endpoint link is not upVidya Sagar1-6/+25
13 daysPCI: tegra194: Set LTR message request before PCIe link up in Endpoint modeVidya Sagar1-9/+9
13 daysPCI: tegra194: Disable direct speed change for Endpoint modeVidya Sagar1-0/+4
13 daysPCI: tegra194: Use devm_gpiod_get_optional() to parse "nvidia,refclk-select"Vidya Sagar1-3/+3
13 daysPCI: tegra194: Disable PERST# IRQ only in Endpoint modeManikanta Maddireddy1-1/+2
13 daysPCI: tegra194: Don't force the device into the D0 state before L2Vidya Sagar1-41/+0
13 daysPCI: tegra194: Disable LTSSM after transition to Detect on surprise link downManikanta Maddireddy1-13/+16
13 daysPCI: tegra194: Increase LTSSM poll time on surprise link downManikanta Maddireddy1-15/+21
13 daysPCI: tegra194: Fix polling delay for L2 stateVidya Sagar1-5/+4
2026-04-07Merge tag 'hyperv-fixes-signed-20260406' of git://git.kernel.org/pub/scm/linu...Linus Torvalds1-3/+9
2026-04-07PCI: dw-rockchip: Add pcie_ltssm_state_transition tracepoint supportShawn Lin1-0/+111
2026-04-06PCI: imx6: Fix reference clock source selection for i.MX95Franz Schnyder1-2/+2
2026-04-06PCI: hisi: Use devm_ghes_register_vendor_record_notifier()Kai-Heng Feng1-11/+1
2026-04-04PCI: cadence: Use cdns_pcie_read_sz() for byte or word read accessAksh Garg1-31/+25
2026-04-04PCI: mediatek-gen3: Prevent leaking IRQ domains when IRQ not foundChen-Yu Tsai1-4/+4
2026-04-04PCI: tegra194: Expose BAR2 (MSI-X) and BAR4 (DMA) as 64-bit BAR_RESERVEDManikanta Maddireddy1-5/+37
generated by cgit v1.2.3 (git 2.39.0) at 2026-04-22 00:38:17 +0300