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path: root/drivers/gpu/drm/amd/amdgpu
AgeCommit message (Expand)AuthorFilesLines
3 daysdrm/amdgpu/vpe: Force collaborate sync after TRAPAlan Liu1-1/+6
12 daysdrm/amdgpu/jpeg: set no_user_fence for JPEG v5.0.1 ringYinjie Yao1-0/+1
12 daysdrm/amdgpu/jpeg: set no_user_fence for JPEG v5.0.0 ringYinjie Yao1-0/+1
12 daysdrm/amdgpu/jpeg: set no_user_fence for JPEG v4.0.5 ringYinjie Yao1-0/+1
12 daysdrm/amdgpu/jpeg: set no_user_fence for JPEG v4.0.3 ringYinjie Yao1-0/+1
12 daysdrm/amdgpu/jpeg: set no_user_fence for JPEG v4.0 ringYinjie Yao1-0/+1
12 daysdrm/amdgpu/jpeg: set no_user_fence for JPEG v3.0 ringYinjie Yao1-0/+1
12 daysdrm/amdgpu/jpeg: set no_user_fence for JPEG v2.5 ringYinjie Yao1-0/+2
12 daysdrm/amdgpu/jpeg: set no_user_fence for JPEG v2.0 ringYinjie Yao1-0/+1
12 daysdrm/amdgpu/vcn: set no_user_fence for VCN v5.0.1 enc ringYinjie Yao1-0/+1
12 daysdrm/amdgpu/vcn: set no_user_fence for VCN v5.0.0 enc ringYinjie Yao1-0/+1
12 daysdrm/amdgpu/vcn: set no_user_fence for VCN v4.0.5 enc ringYinjie Yao1-0/+1
12 daysdrm/amdgpu/vcn: set no_user_fence for VCN v4.0.3 enc ringYinjie Yao1-0/+1
12 daysdrm/amdgpu/vcn: set no_user_fence for VCN v4.0 enc ringYinjie Yao1-0/+1
12 daysdrm/amdgpu/vcn: set no_user_fence for VCN v3.0 enc/dec ringsYinjie Yao1-0/+3
12 daysdrm/amdgpu/vcn: set no_user_fence for VCN v2.5 enc/dec ringsYinjie Yao1-0/+2
12 daysdrm/amdgpu/vcn: set no_user_fence for VCN v2.0 enc/dec ringsYinjie Yao1-0/+2
12 daysdrm/amdgpu/gfx6: Support harvested SI chips with disabled TCCs (v2)Timur Kristóf1-0/+66
12 daysdrm/amdgpu/uvd3.1: Don't validate the firmware when already validatedTimur Kristóf1-0/+10
12 daysdrm/amdgpu: fix AMDGPU_INFO_READ_MMR_REGChristian König1-33/+24
12 daysdrm/amdgpu/gmc: Fix AMDGPU_GART_PLACEMENT_LOW to not overlap with VRAMTimur Kristóf1-1/+4
12 daysdrm/amdgpu/uvd4.2: Don't initialize UVD 4.2 when DPM is disabledTimur Kristóf1-0/+5
12 daysdrm/amdgpu/gfx11: look at the right prop for gfx queue priorityAlex Deucher1-1/+1
12 daysdrm/amdgpu/gfx10: look at the right prop for gfx queue priorityAlex Deucher1-1/+1
12 daysdrm/amdgpu: Add default case in DVI mode validationSrinivasan Shanmugam1-0/+2
2026-05-17drm/amdgpu/vcn4: Avoid overflow on msg bound checkBenjamin Cheng1-1/+3
2026-05-17drm/amdgpu/vcn3: Avoid overflow on msg bound checkBenjamin Cheng1-1/+3
2026-05-17drm/amdgpu: rework how we handle TLB fencesAlex Deucher2-1/+8
2026-05-17Revert "drm/amdgpu: don't attach the tlb fence for SI"Prike Liang1-3/+1
2026-05-17drm/amdgpu: Fix validating flush_gpu_tlb_pasid()Timur Kristóf1-2/+4
2026-05-17drm/amdgpu: validate the flush_gpu_tlb_pasid()Prike Liang1-0/+4
2026-05-17drm/amdgpu/sdma4: replace BUG_ON with WARN_ON in fence emissionJohn B. Moore1-2/+2
2026-05-17drm/amdgpu/gfx9: drop unnecessary 64-bit fence flag check in KIQJohn B. Moore1-3/+0
2026-05-17drm/amdgpu: zero-initialize GART table on allocationPhilip Yang1-3/+10
2026-05-17drm/amdgpu/vcn3: Prevent OOB reads when parsing dec msgBenjamin Cheng1-4/+19
2026-05-17drm/amdgpu/vcn4: Prevent OOB reads when parsing dec msgBenjamin Cheng1-3/+18
2026-05-17drm/amdgpu/vce: Prevent partial address patchesBenjamin Cheng1-0/+3
2026-05-17drm/amdgpu/vcn4: Prevent OOB reads when parsing IBBenjamin Cheng1-11/+12
2026-05-17drm/amdgpu: Add bounds checking to ib_{get,set}_valueBenjamin Cheng1-4/+7
2026-05-17drm/amdgpu: gate VM CPU HDP flush on reset lockChenglei Xie1-1/+11
2026-05-17drm/amdgpu: Use SMUIO 15.0.0 offsets for TSC upper and lower count.Ramalingeswara Reddy, Kanala1-5/+26
2026-05-17drm/amdkfd: Clear VRAM on allocation to prevent stale data exposureAmir Shetaia1-1/+2
2026-05-07drm/amdgpu: fix zero-size GDS range init on RDNA4Arjan van de Ven1-0/+3
2026-05-07amdgpu/jpeg: fix deepsleep register for jpeg 5_0_0 and 5_0_2David (Ming Qiang) Wu1-6/+46
2026-05-07drm/amd: Fix set but not used warningsTiezhu Yang2-5/+5
2026-04-27drm/amdgpu: replace PASID IDR with XArrayMikhail Gavrilov1-20/+19
2026-04-22drm/amdgpu: Handle GPU page faults correctly on non-4K page systemsDonet Tom1-3/+3
2026-04-11drm/amdgpu: Change AMDGPU_VA_RESERVED_TRAP_SIZE to 64KBDonet Tom1-1/+1
2026-04-11drm/amdgpu: validate doorbell_offset in user queue creationJunrui Luo1-0/+7
2026-04-11drm/amdgpu: Fix wait after reset sequence in S4Lijo Lazar2-3/+8
generated by cgit v1.2.3 (git 2.39.0) at 2026-06-04 08:44:25 +0300