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path: root/drivers/gpu/drm/amd
AgeCommit message (Expand)AuthorFilesLines
2 daysdrm/amd/display: Validate payload length and link_index in dc_process_dmub_au...Harry Wentland1-1/+5
2 daysdrm/amd/display: Validate GPIO pin LUT table size before iteratingHarry Wentland1-0/+9
2 daysdrm/amd/display: Fix integer overflow in bios_get_image()Harry Wentland1-3/+6
2 daysdrm/amdgpu/vpe: Force collaborate sync after TRAPAlan Liu1-1/+6
12 daysdrm/amd/display: Read EDID from VBIOS embedded panel infoTimur Kristóf2-0/+66
12 daysdrm/amd/display: Allow constructing DCE8 link encoder without DDCTimur Kristóf1-1/+2
12 daysdrm/amd/display: Allow constructing DCE6 link encoder without DDCTimur Kristóf1-1/+2
12 daysdrm/amd/display: Allow DCE link encoder without AUX registersTimur Kristóf1-1/+3
12 daysdrm/amdgpu/jpeg: set no_user_fence for JPEG v5.0.1 ringYinjie Yao1-0/+1
12 daysdrm/amdgpu/jpeg: set no_user_fence for JPEG v5.0.0 ringYinjie Yao1-0/+1
12 daysdrm/amdgpu/jpeg: set no_user_fence for JPEG v4.0.5 ringYinjie Yao1-0/+1
12 daysdrm/amdgpu/jpeg: set no_user_fence for JPEG v4.0.3 ringYinjie Yao1-0/+1
12 daysdrm/amdgpu/jpeg: set no_user_fence for JPEG v4.0 ringYinjie Yao1-0/+1
12 daysdrm/amdgpu/jpeg: set no_user_fence for JPEG v3.0 ringYinjie Yao1-0/+1
12 daysdrm/amdgpu/jpeg: set no_user_fence for JPEG v2.5 ringYinjie Yao1-0/+2
12 daysdrm/amdgpu/jpeg: set no_user_fence for JPEG v2.0 ringYinjie Yao1-0/+1
12 daysdrm/amdgpu/vcn: set no_user_fence for VCN v5.0.1 enc ringYinjie Yao1-0/+1
12 daysdrm/amdgpu/vcn: set no_user_fence for VCN v5.0.0 enc ringYinjie Yao1-0/+1
12 daysdrm/amdgpu/vcn: set no_user_fence for VCN v4.0.5 enc ringYinjie Yao1-0/+1
12 daysdrm/amdgpu/vcn: set no_user_fence for VCN v4.0.3 enc ringYinjie Yao1-0/+1
12 daysdrm/amdgpu/vcn: set no_user_fence for VCN v4.0 enc ringYinjie Yao1-0/+1
12 daysdrm/amdgpu/vcn: set no_user_fence for VCN v3.0 enc/dec ringsYinjie Yao1-0/+3
12 daysdrm/amdgpu/vcn: set no_user_fence for VCN v2.5 enc/dec ringsYinjie Yao1-0/+2
12 daysdrm/amdgpu/vcn: set no_user_fence for VCN v2.0 enc/dec ringsYinjie Yao1-0/+2
12 daysdrm/amdgpu/gfx6: Support harvested SI chips with disabled TCCs (v2)Timur Kristóf1-0/+66
12 daysdrm/amdgpu/uvd3.1: Don't validate the firmware when already validatedTimur Kristóf1-0/+10
12 daysdrm/amdgpu: fix AMDGPU_INFO_READ_MMR_REGChristian König1-33/+24
12 daysdrm/amdgpu/gmc: Fix AMDGPU_GART_PLACEMENT_LOW to not overlap with VRAMTimur Kristóf1-1/+4
12 daysdrm/amdgpu/uvd4.2: Don't initialize UVD 4.2 when DPM is disabledTimur Kristóf1-0/+5
12 daysdrm/amd/pm/smu7: Add SCLK cap for quirky Hawaii boardTimur Kristóf2-4/+27
12 daysdrm/amd/pm/ci: Fill DW8 fields from SMCTimur Kristóf1-2/+1
12 daysdrm/amd/pm/ci: Clear EnabledForActivity field for memory levelsTimur Kristóf1-1/+1
12 daysdrm/amd/pm/ci: Fix powertune defaults for Hawaii 0x67B0Timur Kristóf1-1/+1
12 daysdrm/amd/pm/smu7: Fix SMU7 voltage dependency on display clockTimur Kristóf2-3/+86
12 daysdrm/amd/pm/ci: Disable MCLK DPM on problematic CI ASICsTimur Kristóf1-0/+15
12 daysdrm/amd/pm/ci: Use highest MCLK on CI when MCLK DPM is disabledTimur Kristóf1-0/+8
12 daysdrm/amdgpu/gfx11: look at the right prop for gfx queue priorityAlex Deucher1-1/+1
12 daysdrm/amdgpu/gfx10: look at the right prop for gfx queue priorityAlex Deucher1-1/+1
12 daysdrm/amdgpu: Add default case in DVI mode validationSrinivasan Shanmugam1-0/+2
12 daysdrm/amd/pm: Fix xgmi max speed reportingLijo Lazar1-2/+3
2026-05-17drm/amdgpu/vcn4: Avoid overflow on msg bound checkBenjamin Cheng1-1/+3
2026-05-17drm/amdgpu/vcn3: Avoid overflow on msg bound checkBenjamin Cheng1-1/+3
2026-05-17drm/amdgpu: rework how we handle TLB fencesAlex Deucher2-1/+8
2026-05-17Revert "drm/amdgpu: don't attach the tlb fence for SI"Prike Liang1-3/+1
2026-05-17drm/amdgpu: Fix validating flush_gpu_tlb_pasid()Timur Kristóf1-2/+4
2026-05-17drm/amdgpu: validate the flush_gpu_tlb_pasid()Prike Liang1-0/+4
2026-05-17drm/amdgpu/pm: align Hawaii mclk workaround with radeonAlex Deucher1-4/+4
2026-05-17drm/amdgpu/pm: add missing revision check for CIAlex Deucher1-2/+3
2026-05-17drm/amdgpu/sdma4: replace BUG_ON with WARN_ON in fence emissionJohn B. Moore1-2/+2
2026-05-17drm/amdkfd: Make all TLB-flushes heavy-weightFelix Kuehling4-10/+10
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