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-rw-r--r--Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml32
1 files changed, 32 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml
index 5cebe5eb1efb..539fa3b54b5b 100644
--- a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml
+++ b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml
@@ -23,6 +23,7 @@ properties:
- const: sophgo,sg2044-dwcmshc
- const: sophgo,sg2042-dwcmshc
- enum:
+ - hpe,gsc-dwcmshc
- rockchip,rk3568-dwcmshc
- rockchip,rk3588-dwcmshc
- snps,dwcmshc-sdhci
@@ -79,6 +80,17 @@ properties:
description: Specifies the drive impedance in Ohm.
enum: [33, 40, 50, 66, 100]
+ hpe,gxp-sysreg:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ items:
+ - items:
+ - description: phandle to HPE GXP SoC system register block (syscon)
+ - description: offset of the MSHCCS register within the syscon block
+ description:
+ Phandle to the HPE GXP SoC system register block (syscon) and
+ offset of the MSHCCS register used to configure clock
+ synchronisation for HS200 tuning.
+
required:
- compatible
- reg
@@ -93,6 +105,26 @@ allOf:
properties:
compatible:
contains:
+ const: hpe,gsc-dwcmshc
+
+ then:
+ properties:
+ clocks:
+ items:
+ - description: core clock
+ clock-names:
+ items:
+ - const: core
+ required:
+ - hpe,gxp-sysreg
+ else:
+ properties:
+ hpe,gxp-sysreg: false
+
+ - if:
+ properties:
+ compatible:
+ contains:
const: sophgo,sg2042-dwcmshc
then: