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author | Shiju Jose <shiju.jose@huawei.com> | 2025-01-11 12:17:52 +0300 |
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committer | Dave Jiang <dave.jiang@intel.com> | 2025-01-13 19:33:21 +0300 |
commit | 8166675850165f3d7cf3e33519515656e5c72bfc (patch) | |
tree | f12d2890358ec77f91f0e2e7d7d8b38ca9ae2645 /tools/perf/scripts/python/mem-phys-addr.py | |
parent | 5e31e3477f1661ebbbec1cbf141f91ad3cffafc3 (diff) | |
download | linux-8166675850165f3d7cf3e33519515656e5c72bfc.tar.xz |
cxl/events: Add Component Identifier formatting for CXL spec rev 3.1
Add Component Identifier formatting for CXL spec rev 3.1, Section
8.2.9.2.1, Table 8-44.
Examples for Component Identifier format in trace log,
validity_flags='CHANNEL|RANK|DEVICE|COMPONENT|COMPONENT PLDM FORMAT' \
comp_id=03 74 c5 08 9a 1a 0b fc d2 7e 2f 31 9b 3c 81 4d \
comp_id_pldm_valid_flags='PLDM Entity ID | Resource ID' \
pldm_entity_id=74 c5 08 9a 1a 0b pldm_resource_id=fc d2 7e 2f \
validity_flags='COMPONENT|COMPONENT PLDM FORMAT' \
comp_id=02 74 c5 08 9a 1a 0b fc d2 7e 2f 31 9b 3c 81 4d \
comp_id_pldm_valid_flags='Resource ID' \
pldm_entity_id=0x00 pldm_resource_id=fc d2 7e 2f
If the validity flags for component ID/component ID format or PLDM ID or
resource ID are not set, then pldm_entity_id=0x00 or pldm_resource_id=0x00
would be printed.
Component identifier formatting is used in the subsequent patches.
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Ira Weiny <ira.weiny@intel.com>
Signed-off-by: Shiju Jose <shiju.jose@huawei.com>
Link: https://patch.msgid.link/20250111091756.1682-3-shiju.jose@huawei.com
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions