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authorBjorn Helgaas <bhelgaas@google.com>2025-03-27 21:14:51 +0300
committerBjorn Helgaas <bhelgaas@google.com>2025-03-27 21:14:51 +0300
commit79e08f8d4eea3d765bf2ac3005c9a5c3b90d079c (patch)
tree640324e8e4865d89910e5ad2cf2585e0c812fe08 /tools/perf/scripts/python/mem-phys-addr.py
parenta80b04dffe1c3180422c8f043c59b2f8021f98a0 (diff)
parent9e141923cf86b2e1c83d21b87fb4de3d14a20c99 (diff)
downloadlinux-79e08f8d4eea3d765bf2ac3005c9a5c3b90d079c.tar.xz
Merge branch 'pci/controller/xilinx-cpm'
- Free IRQ domain in probe error path to avoid leaking it (Thippeswamy Havalige) - Add DT .compatible "xlnx,versal-cpm5nc-host" and driver support for Versal Net CPM5NC Root Port controller (Thippeswamy Havalige) - Add driver support for CPM5_HOST1 (Thippeswamy Havalige) * pci/controller/xilinx-cpm: PCI: xilinx-cpm: Add cpm_csr register mapping for CPM5_HOST1 variant PCI: xilinx-cpm: Add support for Versal Net CPM5NC Root Port controller dt-bindings: PCI: xilinx-cpm: Add compatible string for CPM5NC Versal Net host PCI: xilinx-cpm: Fix IRQ domain leak in error path of probe
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