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| author | Thippeswamy Havalige <thippeswamy.havalige@amd.com> | 2025-03-17 15:41:36 +0300 |
|---|---|---|
| committer | Krzysztof Wilczyński <kwilczynski@kernel.org> | 2025-03-23 15:40:22 +0300 |
| commit | 9e141923cf86b2e1c83d21b87fb4de3d14a20c99 (patch) | |
| tree | aa5bee0d1ffa9dc99069b6a53ac88c5446022e8b /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | ad3b7174d4d04b7e2ab81df5857c4da6b4bc1ade (diff) | |
| download | linux-9e141923cf86b2e1c83d21b87fb4de3d14a20c99.tar.xz | |
PCI: xilinx-cpm: Add cpm_csr register mapping for CPM5_HOST1 variant
Update the CPM5 check to include CPM5_HOST1 variant. Previously, only
CPM5 was considered when mapping the "cpm_csr" register.
With this change, CPM5_HOST1 is also supported, ensuring proper
resource mapping for this variant.
Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com>
[kwilczynski: commit log]
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Link: https://lore.kernel.org/r/20250317124136.1317723-1-thippeswamy.havalige@amd.com
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions