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authorKan Liang <kan.liang@linux.intel.com>2025-01-29 18:48:18 +0300
committerPeter Zijlstra <peterz@infradead.org>2025-02-08 17:47:25 +0300
commit0a5561501397e2bbd0fb0e300eb489f72a90597a (patch)
tree6392c8406cd9a64ee1a298b0ddc4b2c8072c04bb /scripts/extract-fwblobs
parent469c76a83bb9f6b2c7b2989c46617c4fe01fee79 (diff)
downloadlinux-0a5561501397e2bbd0fb0e300eb489f72a90597a.tar.xz
perf/x86/intel: Clean up PEBS-via-PT on hybrid
The PEBS-via-PT feature is exposed for the e-core of some hybrid platforms, e.g., ADL and MTL. But it never works. $ dmesg | grep PEBS [ 1.793888] core: cpu_atom PMU driver: PEBS-via-PT $ perf record -c 1000 -e '{intel_pt/branch=0/, cpu_atom/cpu-cycles,aux-output/pp}' -C8 Error: The sys_perf_event_open() syscall returned with 22 (Invalid argument) for event (cpu_atom/cpu-cycles,aux-output/pp). "dmesg | grep -i perf" may provide additional information. The "PEBS-via-PT" is printed if the corresponding bit of per-PMU capabilities is set. Since the feature is supported by the e-core HW, perf sets the bit for e-core. However, for Intel PT, if a feature is not supported on all CPUs, it is not supported at all. The PEBS-via-PT event cannot be created successfully. The PEBS-via-PT is no longer enumerated on the latest hybrid platform. It will be deprecated on future platforms with Arch PEBS. Let's remove it from the existing hybrid platforms. Fixes: d9977c43bff8 ("perf/x86: Register hybrid PMUs") Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/20250129154820.3755948-2-kan.liang@linux.intel.com
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