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authorDhananjay Ugwekar <dhananjay.ugwekar@amd.com>2025-01-29 11:05:14 +0300
committerPeter Zijlstra <peterz@infradead.org>2025-02-08 17:47:25 +0300
commit469c76a83bb9f6b2c7b2989c46617c4fe01fee79 (patch)
tree39c774334fda0c5dff7105c3f557f87116d6d6cc /scripts/extract-fwblobs
parent2014c95afecee3e76ca4a56956a936e23283f05b (diff)
downloadlinux-469c76a83bb9f6b2c7b2989c46617c4fe01fee79.tar.xz
perf/x86/rapl: Fix the error checking order
After the commit b4943b8bfc41 ("perf/x86/rapl: Add core energy counter support for AMD CPUs"), the default "perf record"/"perf top" command is broken in systems where there isn't a PMU registered for type PERF_TYPE_RAW. This is due to the change in order of error checks in rapl_pmu_event_init() Due to which we return -EINVAL instead of -ENOENT, when we reach here from the fallback loop in perf_init_event(). Move the "PMU and event type match" back to the beginning of the function so that we return -ENOENT early on. Closes: https://lore.kernel.org/all/uv7mz6vew2bzgre5jdpmwldxljp5djzmuiksqdcdwipfm4zm7w@ribobcretidk/ Fixes: b4943b8bfc41 ("perf/x86/rapl: Add core energy counter support for AMD CPUs") Reported-by: Koichiro Den <koichiro.den@canonical.com> Signed-off-by: Dhananjay Ugwekar <dhananjay.ugwekar@amd.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/20250129080513.30353-1-dhananjay.ugwekar@amd.com
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