Merge tag 'renesas-clk-for-v6.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas

Pull Renesas clk driver updates from Geert Uytterhoeven:

 - Fix s2ram on Renesas RZ/T2H and RZ/N2H
 - Add CAN-FD clocks and resets on Renesas RZ/T2H, RZ/N2H,
   RZ/V2H, and RZ/V2N

* tag 'renesas-clk-for-v6.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
  clk: renesas: Add missing log message terminators
  clk: renesas: rzg2l: Remove DSI clock rate restrictions
  clk: renesas: rzv2h: Deassert reset on assert timeout
  clk: renesas: rzg2l: Deassert reset on assert timeout
  clk: renesas: cpg-mssr: Unlock before reset verification
  clk: renesas: r9a09g056: Add entries for CANFD
  clk: renesas: r9a09g057: Add entries for CANFD
  clk: renesas: r9a09g077: Add CANFD clocks
  clk: renesas: cpg-mssr: Handle RZ/T2H register layout in PM callbacks
  dt-bindings: clock: renesas,r9a09g077/87: Add PCLKCAN ID
  clk: renesas: cpg-mssr: Simplify pointer math in cpg_rzt2h_mstp_read()

1 files changed, 11 insertions, 0 deletions

diff --git a/include/linux/clk/renesas.h b/include/linux/clk/renesas.h
index 69d8159deee3..c360df9fa735 100644
--- a/include/linux/clk/renesas.h
+++ b/include/linux/clk/renesas.h
@@ -35,6 +35,17 @@ void cpg_mssr_detach_dev(struct generic_pm_domain *unused, struct device *dev);
 #define cpg_mssr_detach_dev	NULL
 #endif
 
+enum {
+	PLL5_TARGET_DPI,
+	PLL5_TARGET_DSI
+};
+
+#ifdef CONFIG_CLK_RZG2L
+void rzg2l_cpg_dsi_div_set_divider(u8 divider, int target);
+#else
+static inline void rzg2l_cpg_dsi_div_set_divider(u8 divider, int target) { }
+#endif
+
 /**
  * struct rzv2h_pll_limits - PLL parameter constraints
  *