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authorNeil Armstrong <neil.armstrong@linaro.org>2023-05-23 10:15:45 +0300
committerBjorn Andersson <andersson@kernel.org>2023-05-23 15:37:53 +0300
commitd831312557e7308cdb59da5b3a228175e8d7738d (patch)
treede03fc3ae57827a6c0512cf5bc684e4ff26e3a24 /arch/arm64/boot/dts/qcom/sm8350.dtsi
parentef026e592baa01dd7402511e5ced90f4b3ac3d2c (diff)
downloadlinux-d831312557e7308cdb59da5b3a228175e8d7738d.tar.xz
arm64: dts: qcom: sm8350: add ports subnodes in usb1 qmpphy node
Add the USB3+DP Combo QMP PHY port subnodes in the SM8350 SoC DTSI to avoid duplication in the devices DTs. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230503-topic-sm8450-graphics-dp-next-v3-1-6c43d293995f@linaro.org
Diffstat (limited to 'arch/arm64/boot/dts/qcom/sm8350.dtsi')
-rw-r--r--arch/arm64/boot/dts/qcom/sm8350.dtsi26
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index ebcb481571c2..c057e320c1d0 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -2149,6 +2149,32 @@
#phy-cells = <1>;
status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ usb_1_qmpphy_out: endpoint {
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ usb_1_qmpphy_usb_ss_in: endpoint {
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+
+ usb_1_qmpphy_dp_in: endpoint {
+ };
+ };
+ };
};
usb_2_qmpphy: phy-wrapper@88eb000 {