From d831312557e7308cdb59da5b3a228175e8d7738d Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Tue, 23 May 2023 09:15:45 +0200 Subject: arm64: dts: qcom: sm8350: add ports subnodes in usb1 qmpphy node Add the USB3+DP Combo QMP PHY port subnodes in the SM8350 SoC DTSI to avoid duplication in the devices DTs. Signed-off-by: Neil Armstrong Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230503-topic-sm8450-graphics-dp-next-v3-1-6c43d293995f@linaro.org --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) (limited to 'arch/arm64/boot/dts/qcom/sm8350.dtsi') diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index ebcb481571c2..c057e320c1d0 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -2149,6 +2149,32 @@ #phy-cells = <1>; status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + usb_1_qmpphy_out: endpoint { + }; + }; + + port@1 { + reg = <1>; + + usb_1_qmpphy_usb_ss_in: endpoint { + }; + }; + + port@2 { + reg = <2>; + + usb_1_qmpphy_dp_in: endpoint { + }; + }; + }; }; usb_2_qmpphy: phy-wrapper@88eb000 { -- cgit v1.2.3