diff options
| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2026-03-18 17:01:47 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2026-03-20 13:23:33 +0300 |
| commit | cf3a5a77d82cec9f48b4bcb615876d020566e43a (patch) | |
| tree | ed2f651c89cd0289aea23862bedd63868bc6b40e | |
| parent | 3a7e37edaa071faba1a69d400f091b14eb8bc21f (diff) | |
| download | linux-cf3a5a77d82cec9f48b4bcb615876d020566e43a.tar.xz | |
arm64: dts: renesas: rzt2h-rzn2h-evk: Fix GMAC pins sort order
Restore alphabetical sort order of the pin control subnodes by
exchanging the gmac1-pins and gmac2-pins nodes.
While at it, fix the index in an incorrect "GMAC2" comment.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://patch.msgid.link/4ce75f75a0569a4cc6f74dfda8b75f6f1a2495c1.1773842409.git.geert+renesas@glider.be
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts | 58 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts | 60 |
2 files changed, 59 insertions, 59 deletions
diff --git a/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts b/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts index 52e5f6c3ab67..4c0e52850ca9 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts +++ b/arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts @@ -254,6 +254,35 @@ }; /* + * GMAC1 Pin Configuration: + * + * SW2[8] ON - use pins P33_2-P33_7, P34_0-P34_5, P34_7 and + * P35_0-P35_2 for Ethernet port 3 + */ + gmac1_pins: gmac1-pins { + pinmux = <RZT2H_PORT_PINMUX(33, 2, 0xf)>, /* ETH3_TXCLK */ + <RZT2H_PORT_PINMUX(33, 3, 0xf)>, /* ETH3_TXD0 */ + <RZT2H_PORT_PINMUX(33, 4, 0xf)>, /* ETH3_TXD1 */ + <RZT2H_PORT_PINMUX(33, 5, 0xf)>, /* ETH3_TXD2 */ + <RZT2H_PORT_PINMUX(33, 6, 0xf)>, /* ETH3_TXD3 */ + <RZT2H_PORT_PINMUX(33, 7, 0xf)>, /* ETH3_TXEN */ + <RZT2H_PORT_PINMUX(34, 0, 0xf)>, /* ETH3_RXCLK */ + <RZT2H_PORT_PINMUX(34, 1, 0xf)>, /* ETH3_RXD0 */ + <RZT2H_PORT_PINMUX(34, 2, 0xf)>, /* ETH3_RXD1 */ + <RZT2H_PORT_PINMUX(34, 3, 0xf)>, /* ETH3_RXD2 */ + <RZT2H_PORT_PINMUX(34, 4, 0xf)>, /* ETH3_RXD3 */ + <RZT2H_PORT_PINMUX(34, 5, 0xf)>, /* ETH3_RXDV */ + <RZT2H_PORT_PINMUX(34, 7, 0xf)>, /* ETH3_TXER */ + <RZT2H_PORT_PINMUX(35, 0, 0xf)>, /* ETH3_RXER */ + <RZT2H_PORT_PINMUX(35, 1, 0xf)>, /* ETH3_CRS */ + <RZT2H_PORT_PINMUX(35, 2, 0xf)>, /* ETH3_COL */ + <RZT2H_PORT_PINMUX(26, 1, 0x10)>, /* GMAC1_MDC */ + <RZT2H_PORT_PINMUX(26, 2, 0x10)>, /* GMAC1_MDIO */ + <RZT2H_PORT_PINMUX(34, 6, 0x2)>, /* ETH3_REFCLK */ + <RZT2H_PORT_PINMUX(27, 2, 0x0)>; /* IRQ3 */ + }; + + /* * GMAC2 Pin Configuration: * * SW2[6] OFF - connect MDC/MDIO of Ethernet port 2 to GMAC2 @@ -284,35 +313,6 @@ }; /* - * GMAC1 Pin Configuration: - * - * SW2[8] ON - use pins P33_2-P33_7, P34_0-P34_5, P34_7 and - * P35_0-P35_2 for Ethernet port 3 - */ - gmac1_pins: gmac1-pins { - pinmux = <RZT2H_PORT_PINMUX(33, 2, 0xf)>, /* ETH3_TXCLK */ - <RZT2H_PORT_PINMUX(33, 3, 0xf)>, /* ETH3_TXD0 */ - <RZT2H_PORT_PINMUX(33, 4, 0xf)>, /* ETH3_TXD1 */ - <RZT2H_PORT_PINMUX(33, 5, 0xf)>, /* ETH3_TXD2 */ - <RZT2H_PORT_PINMUX(33, 6, 0xf)>, /* ETH3_TXD3 */ - <RZT2H_PORT_PINMUX(33, 7, 0xf)>, /* ETH3_TXEN */ - <RZT2H_PORT_PINMUX(34, 0, 0xf)>, /* ETH3_RXCLK */ - <RZT2H_PORT_PINMUX(34, 1, 0xf)>, /* ETH3_RXD0 */ - <RZT2H_PORT_PINMUX(34, 2, 0xf)>, /* ETH3_RXD1 */ - <RZT2H_PORT_PINMUX(34, 3, 0xf)>, /* ETH3_RXD2 */ - <RZT2H_PORT_PINMUX(34, 4, 0xf)>, /* ETH3_RXD3 */ - <RZT2H_PORT_PINMUX(34, 5, 0xf)>, /* ETH3_RXDV */ - <RZT2H_PORT_PINMUX(34, 7, 0xf)>, /* ETH3_TXER */ - <RZT2H_PORT_PINMUX(35, 0, 0xf)>, /* ETH3_RXER */ - <RZT2H_PORT_PINMUX(35, 1, 0xf)>, /* ETH3_CRS */ - <RZT2H_PORT_PINMUX(35, 2, 0xf)>, /* ETH3_COL */ - <RZT2H_PORT_PINMUX(26, 1, 0x10)>, /* GMAC1_MDC */ - <RZT2H_PORT_PINMUX(26, 2, 0x10)>, /* GMAC1_MDIO */ - <RZT2H_PORT_PINMUX(34, 6, 0x2)>, /* ETH3_REFCLK */ - <RZT2H_PORT_PINMUX(27, 2, 0x0)>; /* IRQ3 */ - }; - - /* * I2C0 Pin Configuration: * ------------------------ * Signal | Pin | SW6 diff --git a/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts b/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts index 3c636c92f3d6..ef6cc7497c2c 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts +++ b/arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts @@ -337,6 +337,36 @@ }; /* + * GMAC1 Pin Configuration: + * + * DSW5[8] ON - use pins P00_0-P00_2, P33_2-P33_7, P34_0-P34_6 + * for Ethernet port 3 + * DSW12[1] OFF; DSW12[2] ON - use pin P00_3 for Ethernet port 3 + */ + gmac1_pins: gmac1-pins { + pinmux = <RZT2H_PORT_PINMUX(33, 2, 0xf)>, /* ETH3_TXCLK */ + <RZT2H_PORT_PINMUX(33, 3, 0xf)>, /* ETH3_TXD0 */ + <RZT2H_PORT_PINMUX(33, 4, 0xf)>, /* ETH3_TXD0 */ + <RZT2H_PORT_PINMUX(33, 5, 0xf)>, /* ETH3_TXD2 */ + <RZT2H_PORT_PINMUX(33, 6, 0xf)>, /* ETH3_TXD3 */ + <RZT2H_PORT_PINMUX(33, 7, 0xf)>, /* ETH3_TXEN */ + <RZT2H_PORT_PINMUX(34, 0, 0xf)>, /* ETH3_RXCLK */ + <RZT2H_PORT_PINMUX(34, 1, 0xf)>, /* ETH3_RXD0 */ + <RZT2H_PORT_PINMUX(34, 2, 0xf)>, /* ETH3_RXD1 */ + <RZT2H_PORT_PINMUX(34, 3, 0xf)>, /* ETH3_RXD2 */ + <RZT2H_PORT_PINMUX(34, 4, 0xf)>, /* ETH3_RXD3 */ + <RZT2H_PORT_PINMUX(34, 5, 0xf)>, /* ETH3_RXDV */ + <RZT2H_PORT_PINMUX(0, 0, 0xf)>, /* ETH3_TXER */ + <RZT2H_PORT_PINMUX(0, 1, 0xf)>, /* ETH3_RXER */ + <RZT2H_PORT_PINMUX(0, 2, 0xf)>, /* ETH3_CRS */ + <RZT2H_PORT_PINMUX(0, 3, 0xf)>, /* ETH3_COL */ + <RZT2H_PORT_PINMUX(26, 1, 0x10)>, /* GMAC1_MDC */ + <RZT2H_PORT_PINMUX(26, 2, 0x10)>, /* GMAC1_MDIO */ + <RZT2H_PORT_PINMUX(34, 6, 0x2)>, /* ETH3_REFCLK */ + <RZT2H_PORT_PINMUX(17, 3, 0x0)>; /* IRQ15 */ + }; + + /* * GMAC2 Pin Configuration: * * DSW5[6] OFF - connect MDC/MDIO of Ethernet port 2 to GMAC2 @@ -369,36 +399,6 @@ }; /* - * GMAC2 Pin Configuration: - * - * DSW5[8] ON - use pins P00_0-P00_2, P33_2-P33_7, P34_0-P34_6 - * for Ethernet port 3 - * DSW12[1] OFF; DSW12[2] ON - use pin P00_3 for Ethernet port 3 - */ - gmac1_pins: gmac1-pins { - pinmux = <RZT2H_PORT_PINMUX(33, 2, 0xf)>, /* ETH3_TXCLK */ - <RZT2H_PORT_PINMUX(33, 3, 0xf)>, /* ETH3_TXD0 */ - <RZT2H_PORT_PINMUX(33, 4, 0xf)>, /* ETH3_TXD0 */ - <RZT2H_PORT_PINMUX(33, 5, 0xf)>, /* ETH3_TXD2 */ - <RZT2H_PORT_PINMUX(33, 6, 0xf)>, /* ETH3_TXD3 */ - <RZT2H_PORT_PINMUX(33, 7, 0xf)>, /* ETH3_TXEN */ - <RZT2H_PORT_PINMUX(34, 0, 0xf)>, /* ETH3_RXCLK */ - <RZT2H_PORT_PINMUX(34, 1, 0xf)>, /* ETH3_RXD0 */ - <RZT2H_PORT_PINMUX(34, 2, 0xf)>, /* ETH3_RXD1 */ - <RZT2H_PORT_PINMUX(34, 3, 0xf)>, /* ETH3_RXD2 */ - <RZT2H_PORT_PINMUX(34, 4, 0xf)>, /* ETH3_RXD3 */ - <RZT2H_PORT_PINMUX(34, 5, 0xf)>, /* ETH3_RXDV */ - <RZT2H_PORT_PINMUX(0, 0, 0xf)>, /* ETH3_TXER */ - <RZT2H_PORT_PINMUX(0, 1, 0xf)>, /* ETH3_RXER */ - <RZT2H_PORT_PINMUX(0, 2, 0xf)>, /* ETH3_CRS */ - <RZT2H_PORT_PINMUX(0, 3, 0xf)>, /* ETH3_COL */ - <RZT2H_PORT_PINMUX(26, 1, 0x10)>, /* GMAC1_MDC */ - <RZT2H_PORT_PINMUX(26, 2, 0x10)>, /* GMAC1_MDIO */ - <RZT2H_PORT_PINMUX(34, 6, 0x2)>, /* ETH3_REFCLK */ - <RZT2H_PORT_PINMUX(17, 3, 0x0)>; /* IRQ15 */ - }; - - /* * I2C0 Pin Configuration: * ------------------------ * Signal | Pin | DSW15 |