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2025-09-26MdePkg: Remove ARM32 Support from BaseSynchronizationLibOliver Smith-Denny1-5/+1
edk2 is dropping support for the ARM32 architecture. This commit removes ARM32 code from BaseSynchronizationLib. Signed-off-by: Oliver Smith-Denny <osde@microsoft.com>
2022-11-29BaseSynchronizationLib: Fix RISC-V helper nameSunil V L1-1/+1
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4143 Fix the name of InternalSyncCompareExchange64() function. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reported-by: Zhihao Li <zhihao.li@intel.com> Tested-by: Zhihao Li <zhihao.li@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Daniel Schaefer <git@danielschaefer.me> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2022-10-14MdePkg/BaseSynchronizationLib: LoongArch cache related code.Chao Li1-0/+6
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053 Support LoongArch cache related functions. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Signed-off-by: Chao Li <lichao@loongson.cn> Co-authored-by: Baoqi Zhang <zhangbaoqi@loongson.cn> Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
2022-05-13MdePkg: Remove RVCT supportRebecca Cran1-1/+0
RVCT is obsolete and no longer used. Remove support for it. Signed-off-by: Rebecca Cran <quic_rcran@quicinc.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2020-05-07MdePkg/BaseSynchronizationLib: RISC-V cache related code.Abner Chang1-0/+5
Support RISC-V cache related functions. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672 Signed-off-by: Abner Chang <abner.chang@hpe.com> Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Leif Lindholm <leif.lindholm@linaro.org> Cc: Gilbert Chen <gilbert.chen@hpe.com>
2019-04-09MdePkg: Replace BSD License with BSD+Patent LicenseMichael D Kinney1-6/+1
https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-09-25MdePkg: Removing ipf which is no longer supported from edk2.Chen A Chen1-14/+1
Removing rules for Ipf sources file: * Remove the source file which path with "ipf" and also listed in [Sources.IPF] section of INF file. * Remove the source file which listed in [Components.IPF] section of DSC file and not listed in any other [Components] section. * Remove the embedded Ipf code for MDE_CPU_IPF. Removing rules for Inf file: * Remove IPF from VALID_ARCHITECTURES comments. * Remove DXE_SAL_DRIVER from LIBRARY_CLASS in [Defines] section. * Remove the INF which only listed in [Components.IPF] section in DSC. * Remove statements from [BuildOptions] that provide IPF specific flags. * Remove any IPF sepcific sections. Removing rules for Dec file: * Remove [Includes.IPF] section from Dec. Removing rules for Dsc file: * Remove IPF from SUPPORTED_ARCHITECTURES in [Defines] section of DSC. * Remove any IPF specific sections. * Remove statements from [BuildOptions] that provide IPF specific flags. Cc: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chen A Chen <chen.a.chen@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-09-25MdePkg/SynchronizationLib: fix Interlocked[De|In]crement return valueRuiyu Ni1-10/+8
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1197 Today's InterlockedIncrement()/InterlockedDecrement() guarantees to perform atomic increment/decrement but doesn't guarantee the return value equals to the new value. The patch fixes the behavior to use "XADD" instruction to guarantee the return value equals to the new value. The patch calls intrinsic functions for MSVC tool chain, calls the NASM implementation for INTEL tool chain and calls GCC inline assembly implementation (GccInline.c) for GCC tool chain. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com>
2018-06-28MdePkg: Clean up source filesLiming Gao1-14/+14
1. Do not use tab characters 2. No trailing white space in one line 3. All files must end with CRLF Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com>
2018-06-07MdePkg: Remove X86 ASM and S filesLiming Gao1-11/+1
NASM has replaced ASM and S files. 1. Remove ASM from all modules. 2. Remove S files from the drivers only. 3. https://bugzilla.tianocore.org/show_bug.cgi?id=881 After NASM is updated, S files can be removed from Library. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
2018-04-17MdePkg/Library/BaseSynchronizationLib: Enable VS2017/ARM64 buildsPete Batard1-1/+2
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Pete Batard <pete@akeo.ie> Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-06-28MdePkg BaseSynchronizationLib: Convert X64/InterlockedIncrement.asm to NASMJordan Justen1-0/+1
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert X64/InterlockedIncrement.asm to X64/InterlockedIncrement.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseSynchronizationLib: Convert X64/InterlockedDecrement.asm to NASMJordan Justen1-0/+1
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert X64/InterlockedDecrement.asm to X64/InterlockedDecrement.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseSynchronizationLib: Convert X64/InterlockedCompareExchange16.asm ↵Jordan Justen1-0/+1
to NASM The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert X64/InterlockedCompareExchange16.asm to X64/InterlockedCompareExchange16.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseSynchronizationLib: Convert X64/InterlockedCompareExchange32.asm ↵Jordan Justen1-0/+1
to NASM The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert X64/InterlockedCompareExchange32.asm to X64/InterlockedCompareExchange32.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseSynchronizationLib: Convert X64/InterlockedCompareExchange64.asm ↵Jordan Justen1-0/+1
to NASM The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert X64/InterlockedCompareExchange64.asm to X64/InterlockedCompareExchange64.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseSynchronizationLib: Convert Ia32/InterlockedIncrement.asm to NASMJordan Justen1-0/+1
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/InterlockedIncrement.asm to Ia32/InterlockedIncrement.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseSynchronizationLib: Convert Ia32/InterlockedDecrement.asm to NASMJordan Justen1-0/+1
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/InterlockedDecrement.asm to Ia32/InterlockedDecrement.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseSynchronizationLib: Convert Ia32/InterlockedCompareExchange16.asm ↵Jordan Justen1-0/+1
to NASM The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/InterlockedCompareExchange16.asm to Ia32/InterlockedCompareExchange16.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseSynchronizationLib: Convert Ia32/InterlockedCompareExchange32.asm ↵Jordan Justen1-0/+1
to NASM The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/InterlockedCompareExchange32.asm to Ia32/InterlockedCompareExchange32.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseSynchronizationLib: Convert Ia32/InterlockedCompareExchange64.asm ↵Jordan Justen1-0/+1
to NASM The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/InterlockedCompareExchange64.asm to Ia32/InterlockedCompareExchange64.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-04-05MdePkg/BaseSynchronizationLib: Add spin lock alignment for IA32/x64Jeff Fan1-1/+8
From Intel(R) 64 and IA-32 Architectures Software Developer's Manual, one lock or semaphore is suggested to be present within a cache line. If the processors are based on Intel NetBurst microarchitecture, two cache lines are suggested. This could minimize the bus traffic required to service locks. Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
2015-02-28MdePkg/BaseSynchronizationLib: Add InterlockedCompareExchange16Ard Biesheuvel1-0/+5
This implements the function InterlockedCompareExchange16 () for all architectures, using architecture and toolchain specific intrinsics or primitive assembler instructions. Contributed-under: TianoCore Contribution Agreement 1.0 Reviewed-by: Olivier Martin <olivier.martin@arm.com> Acked-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16966 6f19259b-4bc3-4df7-8a09-765794883524
2015-02-28MdePkg/BaseSynchronizationLib: Added proper support for ARM architectureOlivier Martin1-2/+3
This implements the following synchronization primitives for AArch64 (GCC) and ARM (GCC & RVCT): InternalSyncCompareExchange32 InternalSyncCompareExchange64 InternalSyncIncrement InternalSyncDecrement Note: these functions are implemented using the exclusive monitor, which implies that they can only be used after the caches (and hence the MMU) have been enabled. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Laszlo Ersek <lersek@redhat.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16965 6f19259b-4bc3-4df7-8a09-765794883524
2014-08-27MdePkg: INF/DEC file updates to EDK II packagesGao, Liming1-2/+4
1. Usage information in INF file comment blocks are either incomplete or incorrect. This includes usage information for Protocols/PPIs/GUIDs/PCDs/HOBs/Events/BootModes. The syntax for usage information in comment blocks is defined in the EDK II Module Information (INF) Specification Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Gao, Liming <liming.gao@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15917 6f19259b-4bc3-4df7-8a09-765794883524
2013-07-29MdePkg/BaseSynchronizationLib: Added ARM Aarch64 architecture supportHarry Liebel1-1/+5
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Harry Liebel <Harry.Liebel@arm.com> Signed-off-by: Olivier Martin <olivier.martin@arm.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14517 6f19259b-4bc3-4df7-8a09-765794883524
2010-06-26Minor grammatical work--mostly adding periods. Items with ONLY period added ↵myronporter1-1/+1
did not have the heading date changed, but Items with content changes had heading copyright dates updated. Sending separately a list of files missing Doxygen @param and @return information. (PENDING) git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10604 6f19259b-4bc3-4df7-8a09-765794883524
2010-05-181. Restore the inline C implementation of GCC assembly files that was ↵qhuang81-9/+2
temporarily removed in Svn r10045. 2. Remove 139 GCC assembly files whose functionality have been covered in the inline C implementation. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10503 6f19259b-4bc3-4df7-8a09-765794883524
2010-04-23Update the copyright notice formathhtian1-3/+3
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10413 6f19259b-4bc3-4df7-8a09-765794883524
2010-02-241. Correct File header to ## @filelgao41-4/+4
2. Remove unnecessary .common] postfix on section. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10052 6f19259b-4bc3-4df7-8a09-765794883524
2010-02-23Temporarily remove the C implementation of some GCC assembly files in ↵qhuang81-3/+1
MdePkg. They are kept in repository and will be re-evaluate later. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10045 6f19259b-4bc3-4df7-8a09-765794883524
2009-08-25Fix file headersmdkinney1-1/+4
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9189 6f19259b-4bc3-4df7-8a09-765794883524
2009-08-19Make EOL consistentmdkinney1-5/+5
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9115 6f19259b-4bc3-4df7-8a09-765794883524
2009-08-19Add ARM supportmdkinney1-3/+8
Add C inline versions of the IA32 and X64 assembly functions. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9112 6f19259b-4bc3-4df7-8a09-765794883524
2009-02-23Update to fix several ECC warningqhuang81-3/+8
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7600 6f19259b-4bc3-4df7-8a09-765794883524
2009-01-30Split out Synchronization Library from Base Librarymdkinney1-0/+88
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7377 6f19259b-4bc3-4df7-8a09-765794883524
generated by cgit v1.2.3 (git 2.39.0) at 2026-09-28 11:31:47 +0300