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2026-06-09MdePkg: Replace manual alignment checks with helper macrosMingjie Shen6-12/+12
Replace manual alignment checks with IS_ALIGNED() and ADDRESS_IS_ALIGNED(). Convert the following bitmask and modulo forms: - ((E & ((PowOf2Expr) - ONE)) == ZERO) - ((E & ((PowOf2Expr) - ONE)) != ZERO) - ((E % (PowOf2Expr)) == ZERO) - ((E % (PowOf2Expr)) != ZERO) to the corresponding helper macro forms: + IS_ALIGNED (E, PowOf2Expr) + !IS_ALIGNED (E, PowOf2Expr) PowOf2Expr is limited to known power-of-two expressions, including SIZE_* and BASE_* macros, EFI_PAGE_SIZE, CPU_STACK_ALIGNMENT, RUNTIME_PAGE_ALLOCATION_GRANULARITY, sizeof() of UEFI integer types (e.g. BOOLEAN, CHAR16, UINT32, UINTN) and pointer types, and 1 << E1 expressions. Address checks that cast the checked value to UINTN are written with ADDRESS_IS_ALIGNED(). The change was generated with the Coccinelle semantic patch below. ```smpl @power_of_2_expr@ expression PowOf2Expr; expression E1; typedef BOOLEAN, CHAR8, CHAR16, INT8, UINT8, INT16, UINT16, INT32, UINT32, INT64, UINT64, INTN, UINTN; type ScalarType = { BOOLEAN, CHAR8, CHAR16, INT8, UINT8, INT16, UINT16, INT32, UINT32, INT64, UINT64, INTN, UINTN }; type AnyType; type PointerType = AnyType *; idexpression ScalarType ScalarValue; idexpression PointerType PointerValue; constant SizeBase =~ "^(SIZE|BASE)_(1|2|4|8|16|32|64|128|256|512)[KMGTPE]B$"; constant NamedPowerOf2 =~ "^(EFI_PAGE_SIZE|CPU_STACK_ALIGNMENT|RUNTIME_PAGE_ALLOCATION_GRANULARITY)$"; constant ONE = {1, 1U, 1u}; @@ ( ( SizeBase | NamedPowerOf2 | ONE << E1 | sizeof (ScalarType) | sizeof (PointerType) | sizeof (ScalarValue) | sizeof (PointerValue) ) & PowOf2Expr ) @aligned depends on power_of_2_expr disable is_zero,isnt_zero@ expression E; expression power_of_2_expr.PowOf2Expr; constant ONE = {1, 1U, 1u}; constant ZERO = {0, 0U, 0u}; @@ ( ((E & (E - ONE)) == ZERO) | - ((E & ((PowOf2Expr) - ONE)) == ZERO) + IS_ALIGNED (E, PowOf2Expr) | ((E & (E - ONE)) != ZERO) | - ((E & ((PowOf2Expr) - ONE)) != ZERO) + !IS_ALIGNED (E, PowOf2Expr) | - ((E % (PowOf2Expr)) == ZERO) + IS_ALIGNED (E, PowOf2Expr) | - ((E % (PowOf2Expr)) != ZERO) + !IS_ALIGNED (E, PowOf2Expr) ) @address_is_aligned@ typedef UINTN; expression *Address; expression Alignment; @@ - IS_ALIGNED ((UINTN) Address, Alignment) + ADDRESS_IS_ALIGNED (Address, Alignment) @normalize_aligned disable paren expression@ expression E, SZ; @@ ( - (IS_ALIGNED (E, SZ)) + IS_ALIGNED (E, SZ) | - (!IS_ALIGNED (E, SZ)) + !IS_ALIGNED (E, SZ) ) @normalize_macro_args disable paren expression@ expression E, SZ; @@ ( - IS_ALIGNED ((E), SZ) + IS_ALIGNED (E, SZ) | - IS_ALIGNED (E, (SZ)) + IS_ALIGNED (E, SZ) ) ``` Signed-off-by: Mingjie Shen <shen497@purdue.edu>
2026-06-03MdePkg: Remove redundant section name in inf filesQihang Gao1-3/+1
[Sources] appears twice in BaseMemoryLibOptDxe.inf, [Sources.X64] appears twice in StandaloneMmCoreEntryPoint.inf, remove the redundant ones to make the files more concise. Signed-off-by: Qihang Gao <gaoqihang@loongson.cn>
2026-02-24MdePkg: Replace include guards with #pragma onceMichael Kubacki1-4/+1
Replace traditional `#ifndef`/`#define`/`#endif` include guards with `#pragma` once. `#pragma once` is a widely supported preprocessor directive that prevents header files from being included multiple times. It is supported by all toolchains used to build edk2: GCC, Clang/LLVM, and MSVC. Compared to macro-based include guards, `#pragma once`: - Eliminates the risk of macro name collisions or copy/paste errors where two headers inadvertently use the same guard macro. - Eliminate inconsistency in the way include guard macros are named (e.g., some files use `__FILE_H__`, others use `FILE_H_`, etc.). - Reduces boilerplate (three lines replaced by one). - Avoids polluting the macro namespace with guard symbols. - Can improve build times as the preprocessor can skip re-opening the file entirely, rather than re-reading it to find the matching `#endif` ("multiple-include optimization"). - Note that some compilers may already optimize traditional include guards, by recognzining the idiomatic pattern. This change is made acknowledging that overall portability of the code will technically be reduced, as `#pragma once` is not part of the C/C++ standards. However, this is considered acceptable given: 1. edk2 already defines a subset of supported compilers in BaseTools/Conf/tools_def.template, all of which have supported `#pragma once` for over two decades. 2. There have been concerns raised to the project about inconsistent include guard naming and potential macro collisions. Approximate compiler support dates: - MSVC: Supported since Visual C++ 4.2 (1996) - GCC: Supported since 3.4 (2004) (http://gnu.ist.utl.pt/software/gcc/gcc-3.4/changes.html) - Clang (LLVM based): Since initial release in 2007 Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
2025-09-26MdePkg: Remove ARM32 Support from BaseMemoryLibOptDxeOliver Smith-Denny13-1073/+5
edk2 is dropping support for the ARM32 architecture. This commit removes ARM32 code from BaseMemoryLibOptDxe. Signed-off-by: Oliver Smith-Denny <osde@microsoft.com>
2024-09-12Refactor SetMemWrapper to reduce binary sizeAshraf Ali3-35/+56
Moved SetMemN API to a separate file to eliminate unnecessary inclusion of InternalMemSetMem64 and InternalMemSetMem32 APIs in driver binary. When the compiler linking the Object files it may not remove all the unused from NASM OBJs. This change is to reorganize the C files to minimize the impact of the NASM behavior resulting is code size reduction. Signed-off-by: Ashraf Ali <ashraf.ali.s@intel.com>
2024-08-31MdePkg: Remove duplicate source from BaseMemoryLib INF filesAshraf Ali1-11/+0
Signed-off-by: Ashraf Ali <ashraf.ali.s@intel.com>
2023-03-30MdePkg/BaseMemoryLibOptDxe AARCH64: Make asm files BTI compatibleArd Biesheuvel5-0/+9
Add the BTI instructions and the associated note to make the AArch64 asm objects compatible with BTI enforcement. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com> Reviewed-by: Oliver Smith-Denny <osd@smith-denny.com>
2022-05-13MdePkg: Remove RVCT supportRebecca Cran1-6/+0
RVCT is obsolete and no longer used. Remove support for it. Signed-off-by: Rebecca Cran <quic_rcran@quicinc.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
2021-12-07MdePkg: Apply uncrustify changesMichael Kubacki10-75/+89
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the MdePkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
2020-08-06MdePkg/BaseMemoryLibOptDxe: Apply BSD-2-Clause-PatentMichael D Kinney11-313/+11
Change license to BSD-2-Clause-Patent using an SPDX-License-Identifier statement. Cc: Liming Gao <liming.gao@intel.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com> Acked-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
2019-04-09MdePkg: Replace BSD License with BSD+Patent LicenseMichael D Kinney46-320/+46
https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2019-04-03MdePkg/BaseMemoryLibOptDxe: Remove .S files for IA32 and X64 archShenglei Zhang23-1222/+0
.nasm file has been added for X86 arch. .S assembly code is not required any more. https://bugzilla.tianocore.org/show_bug.cgi?id=1594 Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-12-13MdePkg/BaseMemoryLibOptDxe ARM: add missing function annotationsArd Biesheuvel4-0/+8
ARM uses the low order bit of a branch target address to decide in which execution mode (ARM or Thumb) a function needs to be called. In order for this to work across object files, ELF function symbols will have the low bit set if they were emitted in Thumb mode and cleared otherwise. This annotation is only emitted if the ELF symbols are annotated as function, since taking the address of some data symbol (e.g., a literal) should not produce a value with the low bit set, even if it appears in an object file containing Thumb code. This means that all functions coded in assembler must have this function annotation, or they may end up getting called in the wrong mode, crashing the program. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com>
2018-06-28MdePkg: Clean up source filesLiming Gao15-41/+41
1. Do not use tab characters 2. No trailing white space in one line 3. All files must end with CRLF Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com>
2018-06-07MdePkg: Remove X86 ASM and S filesLiming Gao23-1219/+1
NASM has replaced ASM and S files. 1. Remove ASM from all modules. 2. Remove S files from the drivers only. 3. https://bugzilla.tianocore.org/show_bug.cgi?id=881 After NASM is updated, S files can be removed from Library. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
2016-11-04MdePkg/BaseMemoryLib*: check for zero length in ZeroMem ()Ard Biesheuvel1-1/+5
Unlike other string functions in this library, ZeroMem () does not return early when the length of the input buffer is 0. So add the same to ZeroMem () as well, for all implementations of BaseMemoryLib living under MdePkg/ This fixes an issue with the ARM implementation of BaseMemoryLibOPtDxe, whose InternalMemZeroMem code does not expect a length of 0, and always writes at least a single byte. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-10-25MdePkg BaseMemoryLibOptDxe: Add function comment for InternalMemCompareGuidLiming Gao1-0/+13
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2016-09-27MdePkg/BaseMemoryLibOptDxe: replace deprecated uses of IT blocksArd Biesheuvel5-27/+33
The ARM architecture version 8 deprecates all uses of the IT instruction except cases where it is followed by a single narrow instruction. So replace any occurrences with equivalent sequences that adhere to the new rules. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-09-27MdePkg/BaseMemoryLibOptDxe ARM: fix Thumb-2 bug in ScanMem()Ard Biesheuvel1-4/+5
The ARM ScanMem() in BaseMemoryLibOptDxe contains code from the open source cortex-strings library, and inherited a bug from it where the conditional execution of a sequence of instructions is erroneously made dependent on the same condition. Since the final 'addeq' is supposed to be dependent on the preceding 'tsteq' instruction, they cannot be part of the same IT block. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-09-23MdePkg/BaseMemoryLibOptDxe ARM AARCH64: fix thinko in SetMem##Ard Biesheuvel3-19/+44
The new InternalMemSetMem##() implementations for ARM and AARCH64 in BaseMemoryLibOptDxe fail to take into account that the 'length' argument is not in bytes, but in number of items to be copied. So multiply by the item size before proceeding. Reported-by: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com> Tested-by: Laszlo Ersek <lersek@redhat.com>
2016-09-21MdePkg/BaseMemoryLibOptDxe ARM|AARCH64: implement accelerated GUID functionsArd Biesheuvel5-1/+333
As reported by Vishal, CompareGuid() is a hotspot, and switching from BaseMemoryLibStm in ArmPkg/ to BaseMemoryLibOptDxe causes a noticeable performance regression due to the fact that BaseMemoryLibOptDxe uses unaligned accessors explicitly to implement CompareGuid() and the related functions. Since BaseMemoryLibOptDxe on ARM and AARCH64 can only be used in contexts where unaligned accesses are allowed, reimplement these functions for ARM and AARCH64 specifically, using wide accessors that can tolerate any misalignment. Reported-by: "Oliyil Kunnil, Vishal" <vishalo@qti.qualcomm.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-09-21MdePkg/BaseMemoryLibOptDxe ARM: fix arithmetic bugs in CompareMem()Ard Biesheuvel1-2/+2
Fix two bugs: - Erroneous shift of 2 in a bytes to bits conversion. - Use reverse subtract rather than negate for value that is subsequently used as operand #2 in a shift operation. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-09-13MdePkg/BaseMemoryLibOptDxe ARM|AARCH64: disallow use in SEC & PEI phasesArd Biesheuvel1-0/+9
The new accelerated ARM and AARCH64 implementations take advantage of features that are only available when the MMU and Dcache are on. So restrict the use of this library to the DXE phase or later. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-09-13MdePkg/BaseMemoryLibOptDxe: add accelerated AARCH64 routinesArd Biesheuvel5-1/+839
This adds AARCH64 support to BaseMemoryLibOptDxe, based on the cortex-strings library. All string routines are accelerated except ScanMem16, ScanMem32, ScanMem64 and IsZeroBuffer, which can wait for another day. (Very few occurrences exist in the codebase) Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-09-13MdePkg/BaseMemoryLibOptDxe: add accelerated ARM routinesArd Biesheuvel10-14/+1209
This adds ARM support to BaseMemoryLibOptDxe, partially based on the cortex-strings library (ScanMem) and the existing CopyMem() implementation from BaseMemoryLibStm in ArmPkg. All string routines are accelerated except ScanMem16, ScanMem32, ScanMem64 and IsZeroBuffer, which can wait for another day. (Very few occurrences exist in the codebase) Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-08-22MdePkg BaseMemoryLib: Add assembly implementation of API IsZeroBuffer()Hao Wu5-2/+187
Add the implementation of API IsZeroBuffer() via assembly for the following library instances: BaseMemoryLibMmx BaseMemoryLibOptDxe BaseMemoryLibOptPei BaseMemoryLibRepStr Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-08-22MdePkg BaseMemoryLib: Add implementation of API IsZeroGuid()Hao Wu1-1/+30
Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
2016-06-28MdePkg BaseMemoryLibOptDxe: Convert X64/CopyMem.asm to NASMJordan Justen2-0/+84
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert X64/CopyMem.asm to X64/CopyMem.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseMemoryLibOptDxe: Convert X64/SetMem.asm to NASMJordan Justen2-0/+63
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert X64/SetMem.asm to X64/SetMem.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseMemoryLibOptDxe: Convert X64/SetMem16.asm to NASMJordan Justen2-0/+48
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert X64/SetMem16.asm to X64/SetMem16.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseMemoryLibOptDxe: Convert X64/SetMem32.asm to NASMJordan Justen2-0/+48
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert X64/SetMem32.asm to X64/SetMem32.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseMemoryLibOptDxe: Convert X64/SetMem64.asm to NASMJordan Justen2-0/+47
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert X64/SetMem64.asm to X64/SetMem64.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseMemoryLibOptDxe: Convert X64/ZeroMem.asm to NASMJordan Justen2-0/+51
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert X64/ZeroMem.asm to X64/ZeroMem.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseMemoryLibOptDxe: Convert X64/CompareMem.asm to NASMJordan Justen2-0/+59
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert X64/CompareMem.asm to X64/CompareMem.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseMemoryLibOptDxe: Convert X64/ScanMem8.asm to NASMJordan Justen2-0/+56
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert X64/ScanMem8.asm to X64/ScanMem8.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseMemoryLibOptDxe: Convert X64/ScanMem16.asm to NASMJordan Justen2-0/+56
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert X64/ScanMem16.asm to X64/ScanMem16.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseMemoryLibOptDxe: Convert X64/ScanMem32.asm to NASMJordan Justen2-0/+56
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert X64/ScanMem32.asm to X64/ScanMem32.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseMemoryLibOptDxe: Convert X64/ScanMem64.asm to NASMJordan Justen2-0/+56
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert X64/ScanMem64.asm to X64/ScanMem64.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseMemoryLibOptDxe: Convert Ia32/CopyMem.asm to NASMJordan Justen2-0/+86
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/CopyMem.asm to Ia32/CopyMem.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseMemoryLibOptDxe: Convert Ia32/SetMem.asm to NASMJordan Justen2-0/+54
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/SetMem.asm to Ia32/SetMem.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseMemoryLibOptDxe: Convert Ia32/SetMem16.asm to NASMJordan Justen2-0/+46
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/SetMem16.asm to Ia32/SetMem16.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseMemoryLibOptDxe: Convert Ia32/SetMem32.asm to NASMJordan Justen2-0/+46
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/SetMem32.asm to Ia32/SetMem32.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseMemoryLibOptDxe: Convert Ia32/SetMem64.asm to NASMJordan Justen2-0/+50
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/SetMem64.asm to Ia32/SetMem64.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseMemoryLibOptDxe: Convert Ia32/ZeroMem.asm to NASMJordan Justen2-0/+51
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/ZeroMem.asm to Ia32/ZeroMem.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseMemoryLibOptDxe: Convert Ia32/CompareMem.asm to NASMJordan Justen2-0/+59
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/CompareMem.asm to Ia32/CompareMem.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseMemoryLibOptDxe: Convert Ia32/ScanMem8.asm to NASMJordan Justen2-0/+56
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/ScanMem8.asm to Ia32/ScanMem8.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseMemoryLibOptDxe: Convert Ia32/ScanMem16.asm to NASMJordan Justen2-0/+56
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/ScanMem16.asm to Ia32/ScanMem16.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseMemoryLibOptDxe: Convert Ia32/ScanMem32.asm to NASMJordan Justen2-0/+56
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/ScanMem32.asm to Ia32/ScanMem32.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-06-28MdePkg BaseMemoryLibOptDxe: Convert Ia32/ScanMem64.asm to NASMJordan Justen2-0/+65
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/ScanMem64.asm to Ia32/ScanMem64.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2015-12-15MdePkg: Convert all .uni files to utf-8Jordan Justen1-0/+0
To convert these files I ran: $ python3 BaseTools/Scripts/ConvertUni.py MdePkg Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19256 6f19259b-4bc3-4df7-8a09-765794883524
generated by cgit v1.2.3 (git 2.39.0) at 2026-09-28 09:14:47 +0300