Tianocore/edk2-platforms.git - EDK II sample platform branches and tags (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2024-07-04	Silicon/RiscVOpensbiLib: fix submodule version	Leif Lindholm	1	-0/+0
2024-05-24	Platform/AMD: Initial commit of cross platform/board interfaces	Abner Chang	1	-0/+0
2023-04-17	Silicon/RISC-V: remove redundant function code from RiscVCpuLib	Evan Chai	1	-40/+1
2023-04-17	Silicon/RISC-V: remove redundant RiscVTimerLib	Evan Chai	2	-234/+0
2022-08-22	RISC-V/RiscVExceptionLib: Follow new CpuExceptionHandlerLib APIs	Abner Chang	1	-58/+24
2022-02-18	RISC-V/ProcessorPkg: Address Core CI Uncrustify errors	Abner Chang	8	-393/+482
2022-02-18	RISC-V/ProcessorPkg: Address Core CI Spelling errors.	Abner Chang	5	-17/+17
2022-02-18	RISC-V/ProcessorPkg: Address Core CI ECC errors.	Abner Chang	2	-2/+2
2021-11-10	RiscV/ProcessorPkg: Use mtime CSR library	Abner Chang	2	-4/+5
2021-11-10	RiscV/ProcessorPkg: Create read mtime CSR library instances	Abner Chang	4	-0/+121
2021-11-10	ProcessorPkg/opensbi: Update opensbi library	Abner Chang	1	-0/+0
2021-10-19	RISC-V: Implement ResetSystem RT call	Daniel Schaefer	2	-1/+43
2021-10-19	RISC-V: Switch to latest OpenSBI	Daniel Schaefer	1	-3/+10
2021-10-19	RISC-V/PlatformPkg: Add FdtPeim to pass DTB from PEI to DXE via HOB	Abner Chang	1	-0/+0
2021-10-19	Silicon/RISC-V: PeiServiceTableLib uses RiscVFirmwareContextLib	Abner Chang	2	-6/+6
2021-10-19	Silicon/RISC-V: Introduce FirmwareContext library	Abner Chang	7	-1/+282
2020-10-02	Silicon/SiFive: Handle case of NULL FirmwareContext	Abner Chang	1	-30/+16
2020-08-23	ProcessorPkg/RiscVPlatformTimerLibNull: NULL instance of RISC-V platform time...	Abner Chang	2	-0/+75
2020-08-22	ProcessorPkg/PeiServicesTablePointerLibOpenSbi:	Abner Chang	3	-0/+179
2020-08-22	ProcessorPkg/Library: Add RiscVEdk2SbiLib	Daniel Schaefer	2	-0/+925
2020-08-22	ProcessorPkg/Library: Add RiscVOpensbiLib	Daniel Schaefer	1	-0/+82
2020-08-22	ProcessorPkg/RiscVOpensbLib: Add opensbi submodule	Daniel Schaefer	1	-0/+0
2020-08-22	ProcessorPkg/Library: Add RISC-V timer library	Abner Chang	2	-0/+233
2020-08-22	ProcessorPkg/Library: Add RISC-V exception library	Abner Chang	5	-0/+469
2020-08-22	ProcessorPkg/Library: RISC-V CPU library	Abner Chang	2	-0/+145