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2026-07-08RiscVPlatformSecLib: Update FfsProcessFvFile usageTuan Phan1-1/+1
The FfsProcessFvFile() has been updated with a new interface. Adjust the implementation accordingly to match the latest definition. Signed-off-by: Tuan Phan <tuan.phan@oss.qualcomm.com>
2026-07-08RISC-V/PlatformPkg/PlatformBootManager: Fix unused variable warningTuan Phan1-5/+2
In PlatformBootManagerDiagnostics(), the Status is not used so remove it. Signed-off-by: Tuan Phan <tuan.phan@oss.qualcomm.com>
2026-03-13Platform/RISC-V/RiscVPlatformSecLib: Link against MemoryAllocationLib202603-before-platform-removalsBenjamin Doron1-0/+1
As discovered on https://github.com/tianocore/edk2-platforms/pull/909, this library uses MemoryAllocationLib without linking against it. This can succeed anyways, since SecCoreNative is this library's only consumer, and it takes the other library, but it's more proper to link against MemoryAllocationLib here too, and compilers will sometimes throw errors if not. Signed-off-by: Benjamin Doron <benjamin.doron@9elements.com>
2025-11-05Platform/RISC-V/RiscVPlatformSecLib: Actually reserve handoff regionBenjamin Doron1-1/+2
An unterminated comment meant that the handoff region wasn't reserved. This will result in stack corruption. Signed-off-by: Benjamin Doron <benjamin.doron@9elements.com>
2025-08-12RISC-V/PlatformPkg: Add FixedRamDiskDxe driverSunil V L4-0/+101
When there is no storage driver for the platform, a fixed memory location can be registered as RAM disk and an OS can be booted using this. Add a driver which registers a RAM disk based on the memory region defined by platform PCD variables. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
2025-08-12Silicon/RISC-V: Remove ProcessorPkgSunil V L1-1/+0
With PI 1.9, we no longer need firmware context. With payload design there is no need of OpenSBI related libraries as well. Also, several RISC-V CPU related functionalities are available now in edk2 itself. So, none of the code in ProcessorPkg is required any more. Remove them. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
2025-08-12RiscVPlatformPkg: Update for payload designSunil V L2-10/+41
Add new modules/libraries and PCDs required for the payload design. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
2025-08-12Platform/RISC-V/PlatformPkg: Remove unnecessary codeSunil V L38-7384/+0
With payload design, several libraries/modules are no longer required. Remove them. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
2025-08-12RISC-V/PlatformPkg: Add PlatformHasAcpiDtDxe driverSunil V L2-0/+117
This driver is required to install either ACPI or DT in the EFI system table based on the PCD setting by the platform. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
2025-08-12RISC-V/PlatformPkg: Add PlatformPeiSunil V L2-0/+188
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
2025-08-12RISC-V/PlatformPkg: Add PrePiHobListPointerLibSunil V L2-0/+68
PrePiHobListPointerLib is a platform specific library required for PEIless booting. Most of the RISC-V systems can reuse this library unless there is some special need. So, add it under PlatformPkg. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
2025-08-12RISC-V/PlatformPkg: Add PlatformSecLibSunil V L7-0/+977
PlatformSecLib is required to have standard way of booting RISC-V SoCs. This supports both PEIless and PEI booting designs. If any platform has some special way of booting, they need to have separate instance of the library local to the platform. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
2025-07-17Update FdtLib path and add missing TimerLibJason Xu1-1/+1
Signed-off-by: Jason Xu <bravejason@outlook.com>
2025-07-17SiFive U540 DSC File Fix to use new FdtLibJason Xu1-5/+5
Signed-off-by: Jason Xu <bravejason@outlook.com>
2025-02-07Update for Stack Cookie Breaking ChangeOliver Smith-Denny1-0/+1
edk2 PR https://github.com/tianocore/edk2/pull/6381 updates the stack cookie mechanism per maintainer request to simplify platform usage. This PR updates edk2-platforms to resolve the breaking change, adding StackCheckLib as a dependency to all SEC modules and removing DSC references to StackCheckLibNull as MdeLibs.dsc.inc does that globally now. Signed-off-by: Oliver Smith-Denny <osde@microsoft.com>
2024-11-14Cleanup Null Stack Cookie ImplementationOliver Smith-Denny1-3/+0
edk2 PR https://github.com/tianocore/edk2/pull/6433 cleans up the null stack cookie implementation, no longer requiring DSCs to manually add the null stack cookie lib to Sec modules. This commit changes all DSCs in edk2-platforms to drop the manual adding. Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
2024-10-24Platform/RISC-V: Add PCD variables related to PCIYang Wang1-0/+19
Pcihostbridgelib uses the general PCD variable. Like PcdPciBusMin PcdPciBusMax ... Cc: Sunil V L <sunilvl@ventanamicro.com> Cc: Leif Lindholm <quic_llindhol@quicinc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Daniel Schaefer <git@danielschaefer.me> Cc: Ray Ni <ray.ni@intel.com> Cc: Ran Wang <wangran@bosc.ac.cn> Signed-off-by: Yang Wang <wangyang@bosc.ac.cn>
2024-10-24RISC-V/PlatformPkg:Added Bit operation header fileYang Wang1-0/+15
Add bit operated macro,like BIT... Cc: Sunil V L <sunilvl@ventanamicro.com> Cc: Leif Lindholm <quic_llindhol@quicinc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Daniel Schaefer <git@danielschaefer.me> Cc: Ray Ni <ray.ni@intel.com> Cc: Ran Wang <wangran@bosc.ac.cn> Signed-off-by: Yang Wang <wangyang@bosc.ac.cn>
2024-09-24Update to New StackCheckLibOliver Smith-Denny1-0/+3
edk2 PR https://github.com/tianocore/edk2/pull/5957 removed BaseStackCheckLib and added StackCheckLibNull (amongst others). This PR updates all dscs/dsc.incs to remove the old BaseStackCheckLib and if appropriate, add StackCheckLibNull to LibraryClasses.common.SEC or to specific SEC libs. For all other component types, MdeLibs.dsc.inc links them to StackCheckLibNull. This does all dscs at once as it is formulaic and fixes build breaks. Continuous-integration-options: PatchCheck.ignore-multi-package Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
2024-09-16Update code to be more C11 compliant by using __func__Rebecca Cran4-49/+49
__FUNCTION__ is a pre-standard extension that gcc and Visual C++ among others support, while __func__ was standardized in C99. Since it's more standard, replace __FUNCTION__ with __func__ throughout edk2-platforms. Signed-off-by: Rebecca Cran <rebecca@bsdio.com>
2023-04-17Platform/Siliocn: Fix building failure caused by wrong lib.Evan Chai3-3/+8
RiscVSbiLib was implemented in MdePkg/Library/BaseRiscVSbiLib. Cc: Daniel Schaefer <git@danielschaefer.me> Cc: Sunil V L <sunilvl@ventanamicro.com> Cc: Andrei Warkentin <andrei.warkentin@intel.com> Signed-off-by: Evan Chai <evan.chai@intel.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2023-01-05Platform/RISC-V/PlatformPkg: Fix image link errorSunil V L1-6/+6
The serial number of Edk2OpensbiPlatformWrapperLib Library and RiscVSpecialPlatformLib Library in the figure is opposite to the text description. Fix it and adjust the text order. Signed-off-by: Dongdong Zhang <zhangdongdong@eswincomputing.com> Acked-by: Abner Chang <abner.chang@amd.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2022-02-18RISC-V/PlatformPkg: Address Core CI Uncrustify errorsAbner Chang21-635/+745
Signed-off-by: Abner Chang <abner.chang@hpe.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Cc: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2022-02-18RISC-V/PlatformPkg: Address Core CI library header check errorsAbner Chang1-0/+2
Signed-off-by: Abner Chang <abner.chang@hpe.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Cc: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2022-02-18RISC-V/PlatformPkg: Address Core CI license check errors.Abner Chang1-6/+5
Signed-off-by: Abner Chang <abner.chang@hpe.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Cc: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2022-02-18RISC-V/PlatformPkg: Address Core CI package dependency check errorsAbner Chang1-1/+0
Signed-off-by: Abner Chang <abner.chang@hpe.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Cc: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2022-02-18RISC-V/PlatformPkg: Address Spelling check errors.Abner Chang12-37/+37
Signed-off-by: Abner Chang <abner.chang@hpe.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Cc: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2022-02-18RISC-V/PlatformPkg: Address ECC errorsAbner Chang30-106/+232
Signed-off-by: Abner Chang <abner.chang@hpe.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Cc: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2022-02-18PlatformPkg/PlatformPei: Fix the build errorAbner Chang3-10/+14
Fix the build error caused by the dependency with SiFive silicon code. Signed-off-by: Abner Chang <abner.chang@hpe.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Cc: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2021-11-23Platform/RISC-V: Initialize variable to zeroAbner Chang1-1/+1
Initialize variable NumberOfPlatformInArray to 0. Signed-off-by: Abner Chang <abner.chang@hpe.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Cc: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Daniel Schaefer <daniel.schaefer@hpe.com>
2021-11-23Platform/RISC-V: Add debug message to SecMain.cAbner Chang1-1/+13
Add more debug messages when search FFS in SEC phase. Signed-off-by: Abner Chang <abner.chang@hpe.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Cc: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Daniel Schaefer <daniel.schaefer@hpe.com>
2021-11-10RISC-V/PlatformPkg: Determine hart number from DTBAbner Chang4-27/+49
Determine total number of hart from DTB instead of using PCD. Signed-off-by: Abner Chang <abner.chang@hpe.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Cc: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2021-11-10RiscVPlatformPkg/Sec: Separate EDK2 Opensbi platform hook.Abner Chang9-426/+598
Separate EDK2 Opensbi platform operations hooks from Secmain as an individual library which can be override by OEM platform. Cc: Sunil V L <sunilvl@ventanamicro.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Signed-off-by: Abner Chang <abner.chang@hpe.com> Reviewed-by: Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2021-11-10RISC-V/PlatformPkg: Updates for the latest OpenSBIAbner Chang6-356/+212
Code changes to incorporate with OpenSBI commit ID: a731c7e36988c3308e1978ecde491f2f6182d490 Cc: Sunil V L <sunilvl@ventanamicro.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Signed-off-by: Abner Chang <abner.chang@hpe.com> Reviewed-by: Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2021-11-10RiscVPlatformPkg/Sec: Add more comments to Secmain.cAbner Chang1-3/+6
Add more comments to SecMain.c Cc: Sunil V L <sunilvl@ventanamicro.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Signed-off-by: Abner Chang <abner.chang@hpe.com> Reviewed-by: Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2021-11-10RiscVPlatformPkg/Sec: Check Cold/Warm hartAbner Chang1-1/+14
Check Coldboot or Warmboot hart in SEC OpenSBI platform function. Cc: Sunil V L <sunilvl@ventanamicro.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Signed-off-by: Abner Chang <abner.chang@hpe.com> Reviewed-by: Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2021-11-10RiscVPlatformPkg/RiscVSpecialPlatformLib: Rename module nameAbner Chang3-3/+4
Rename RiscVSpecialPlatformLib to RiscVSpecialPlatformLibNull because this is the NULL instance for RiscVPlatformPkg. Cc: Sunil V L <sunilvl@ventanamicro.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Signed-off-by: Abner Chang <abner.chang@hpe.com> Reviewed-by: Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2021-11-10RiscVPlatformPkg/OpensbiPlatformLib: Remove platform codeAbner Chang1-18/+7
Remove platform code from generic OpensbiPlatfomLib. Cc: Sunil V L <sunilvl@ventanamicro.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Signed-off-by: Abner Chang <abner.chang@hpe.com> Reviewed-by: Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2021-11-10RiscVPlatformPkg/Sec: Initial hart_index2Id arrayAbner Chang5-13/+96
Initial hart index to Id array by invoking OpenSBI fw_platform_init function. Introduce PcdBootableHartIndexToId PCD which could be used to overwrite the hart_index2Id arrary built from Devie tree according to platform demand. Cc: Sunil V L <sunilvl@ventanamicro.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Signed-off-by: Abner Chang <abner.chang@hpe.com> Reviewed-by: Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2021-11-10Platform/RISC-V: Remove Null instance of OpensbiPlatformLibNullAbner Chang3-90/+1
Remove Null instance of OpensbiPlatformLibNull, OpensbiPlatformLib is the generic one for RsicVPlatformPkg. Cc: Sunil V L <sunilvl@ventanamicro.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Signed-off-by: Abner Chang <abner.chang@hpe.com> Reviewed-by: Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2021-11-10Platform/RISC-V: Remove platform dependency from common platform libAbner Chang4-86/+19
This is the generic library for all RISC-V platforms. Remove the dependencies of SiFive U540 platform. Cc: Sunil V L <sunilvl@ventanamicro.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Signed-off-by: Abner Chang <abner.chang@hpe.com> Reviewed-by: Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2021-11-10Platform/RISC-V: Add NULL library instance of RiscVSpecialPlatformLibAbner Chang4-0/+77
This is the library instance to provide platform_override for the special RISC-V platform. This module incorporates with OpensbiPlatformLib and RISC-V Opensbi library. Cc: Sunil V L <sunilvl@ventanamicro.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Signed-off-by: Abner Chang <abner.chang@hpe.com> Reviewed-by: Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2021-11-10Platform/RISC-V: Use PlatformSecPpiLibAbner Chang5-107/+14
Use PlatformSecPpiLib to get PPI descriptor and remove PPI descriptor related code from SEC. Cc: Sunil V L <sunilvl@ventanamicro.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Signed-off-by: Abner Chang <abner.chang@hpe.com> Reviewed-by: Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2021-11-10Platform/RISC-V: Add library to get PPI descriptorAbner Chang4-0/+90
The library to provide the platform PPI descriptors in PEI core entry before executing PEI core. Cc: Sunil V L <sunilvl@ventanamicro.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Signed-off-by: Abner Chang <abner.chang@hpe.com> Reviewed-by: Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2021-11-10RISC-V: Use RISC-V PeiCoreEntryPoint libraryAbner Chang4-50/+540
1. Use RISC-V PeiCoreEntryPoint library instance for opensbi to switch to the next phase with arg0 as HART Id and arg1 as the SEC to PEI handoff data. 2. Introduce EDK2 opensbi platform operation functions. With this, OEM can has its won platform initialization code before and/or after opensbi vendor platform functions. Cc: Sunil V L <sunilvl@ventanamicro.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Signed-off-by: Abner Chang <abner.chang@hpe.com> Reviewed-by: Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2021-11-10RISC-V: Create opensbi firmware domainsAbner Chang6-75/+124
Incorporate with opensbi to create three firmware domains, - Boot firmware domain, which built with opensbi library as M-mode access only region. - Firmware domain which includes PEI and DXE regions, the PMP attribute is readable, wriable and executable. - EFI Variable region which is readable and writable. Cc: Sunil V L <sunilvl@ventanamicro.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Signed-off-by: Abner Chang <abner.chang@hpe.com> Reviewed-by: Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2021-11-10RISC-V: Add RISC-V PeiCoreEntryPoint libraryAbner Chang4-1/+153
- Add RISC-V PeiCoreEntryPoint library that incorporates with opensbi next phase switching mechanism. - Use RiscVFirmwareContext library to get the pointer of opensbi FirmwareContext. Cc: Sunil V L <sunilvl@ventanamicro.com> Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Signed-off-by: Abner Chang <abner.chang@hpe.com> Reviewed-by: Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2021-11-10RISC-V/PlatformPkg: Update documentAbner Chang3-14/+3336
Update EDK2 RISC-V port architectural diagrams. Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Cc: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Abner Chang <abner.chang@hpe.com> Reviewed-by: Daniel Schaefer <daniel.schaefer@hpe.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
2021-10-19Move OpenSbiPlatformLib to RISC-V/PlatformPkgDaniel Schaefer4-0/+357
It's a generic platform file. Only the device tree decides what happens. Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Cc: Abner Chang <abner.chang@hpe.com> Cc: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Abner Chang <abner.chang@hpe.com> Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
2021-10-19RISC-V: Implement ResetSystem RT callDaniel Schaefer2-0/+161
Cc: Daniel Schaefer <daniel.schaefer@hpe.com> Cc: Abner Chang <abner.chang@hpe.com> Cc: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Abner Chang <abner.chang@hpe.com> Signed-off-by: Daniel Schaefer <daniel.schaefer@hpe.com>
generated by cgit v1.2.3 (git 2.39.0) at 2026-09-08 20:11:44 +0300