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Refactor BoardBdsHookLib to use SimicsUefiDeviceLib and add:
- Video mode selection from simics-uefi device before boot handoff
- Boot device priority from simics-uefi device config string
- Boot option sorting (USB=4, DVD=5, HDD=6, PXE=7, HTTP=8, Shell=150)
- USB HID keyboard device path registration in ConIn/ConInDev
- "Press ESC to enter BIOS menu" on serial and graphics consoles
Update BoardBootManager progress bar text to match.
Signed-off-by: Robert Guenzel <robert.guenzel@intel.com>
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Simics scenarios may need to inject custom DSDT/SSDT tables without
rebuilding the entire BIOS image. No mechanism exists to replace
individual ACPI tables at boot time.
Add ACPI table override support to AcpiPlatform that uses the
SimicsUefiDeviceLib to collect ACPI Tables to add or override.
Signed-off-by: Robert Guenzel <robert.guenzel@intel.com>
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Use SimicsUefiDeviceLib to detect the Simics UEFI PCI config device
during Bochs video mode setup. When present, write each supported
video mode (index, width, height, depth) to the device capabilities
register so the simulator can offer mode selection to the user.
Add a presence guard to prevent MMIO faults when the device is absent.
Signed-off-by: Robert Guenzel <robert.guenzel@intel.com>
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The Simics QSP platform uses a hidden PCI config space device
(simics-uefi device, VID/DID=0xFFFF, SubsysVID/ID=0x8086/0x8086) to
exchange configuration data between the simulator and BIOS. The device
detection logic was duplicated across multiple consumers.
Add SimicsUefiDeviceLib, a shared DXE library that provides:
- SimicsUefiDeviceCheck: probe device presence via PCI config reads
- SimicsUefiDeviceRead: read from device register offset
- SimicsUefiDeviceWrite: write to device register offset
Declare PCI BDF and capabilities register base PCDs in OpenBoardPkg.dec
and add the library class mapping in OpenBoardPkg.dsc.
Signed-off-by: Robert Guenzel <robert.guenzel@intel.com>
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Replace the generic boot logo bitmap with Simics-branded artwork for
visual identification of the QSP BIOS during boot.
Co-authored-by: Claes Lillieskold <claes.lillieskold@intel.com>
Signed-off-by: Robert Guenzel <robert.guenzel@intel.com>
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The Simics QSP platform requires 64-bit PCI MMIO resources for SR-IOV
virtual function BARs. The existing DSDT lacks a resource descriptor
above 4 GiB, MemDetect.c uses a legacy SeaBIOS heuristic for aperture
sizing, and PciLib uses CF8-based I/O that cannot reach extended config
space (offset >= 0x100) needed for SR-IOV capability structures.
Add a QWORDMEMORY resource descriptor in Dsdt.asl covering
0x800000000 - 0x107FFFFFFFF (1 TiB) for PCI bridge resources above
4 GiB.
Replace the 1 GiB alignment heuristic in MemDetect.c with CPUID-based
physical address width detection. Fix the 64-bit aperture base at
0x800000000 and cap the size by the CPU's physical address limit.
Switch PciLib from BasePciLibCf8 to BasePciLibPciExpress so config
registers beyond offset 0x100 are reachable.
Enable PcdSrIovSupport and disable PcdPciDegradeResourceForOptionRom
to preserve 64-bit MMIO space for SR-IOV BARs.
Signed-off-by: Robert Guenzel <robert.guenzel@intel.com>
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On QSP configurations without a SATA controller, the unconditional
PCI register access reads undefined values and may configure incorrect
I/O and memory resources.
Add an explicit PCI vendor/device ID check before accessing SATA
controller registers during PEI platform initialization. Skip SATA
resource configuration when the controller is not present.
Signed-off-by: Robert Guenzel <robert.guenzel@intel.com>
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SimicsOpenBoardPkg does not set several MinPlatformPkg FV PCDs
(PcdFlashFvSecurityBase/Size, PcdFlashFvAdvancedBase/Size, and others),
leaving them at their default value of 0. ReportPreMemFv() and
ReportPostMemFv() unconditionally install FV Info PPIs for all of these,
which triggers notify callbacks (e.g., Tcg2Pei) that attempt to process
a bogus FV at address 0 with size 0, leading to undefined behavior.
Add null guards to skip FV Info PPI installation when both the base
address and size PCDs are zero.
Signed-off-by: Robert Guenzel <robert.guenzel@intel.com>
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Fedora grub2 triggers page faults when EFI_MEMORY_ATTRIBUTE_PROTOCOL is
present during OS boot. Add a PCD-gated workaround that uninstalls all
instances of the protocol before handing off to the boot loader.
Declare PcdUninstallMemAttrProtocol (default FALSE) in
OpenBoardPkg.dec [PcdsFeatureFlag]. When enabled, BoardBdsHookLib
enumerates all handles exposing gEfiMemoryAttributeProtocolGuid and
removes them in BdsAfterConsoleReadyBeforeBootOptionCallback.
Signed-off-by: Robert Guenzel <robert.guenzel@intel.com>
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Switch SEC and PEI phases to X64 mode to enable access to PCIe MMIO
config space above 4 GiB needed for SR-IOV capability structures. Set
PEI_ARCH to X64 and SUPPORTED_ARCHITECTURES to X64 only.
Increase flash image from 2 MiB to 17 MiB to accommodate DXE FV growth
from USB stack, network drivers, video, and the larger 64-bit SEC FV.
Update all FDF size defines (CODE_SIZE, FVMAIN_SIZE, SECFV_OFFSET,
SECFV_SIZE) and replace hard-coded FVMAIN size literals with
$(FVMAIN_SIZE) references. Move MEMFD_BASE_ADDRESS from 0x800000 to
0x60800000 for a larger contiguous low-memory region.
Enforce 4K PE/COFF section alignment (/ALIGN:4096 /FILEALIGN:4096) for
DXE_DRIVER, DXE_RUNTIME_DRIVER, DXE_SMM_DRIVER, SMM_CORE, UEFI_DRIVER,
and DXE_CORE module types to satisfy EFI Memory Attributes Table
page-granularity protection requirements.
Remove the edk2-non-osi dependency (clear WORKSPACE_PLATFORM_BIN) and
delete the now-redundant build_config_x64.cfg variant and its
Platform/Intel/build.cfg entry.
Align the DSC with current MinPlatformPkg requirements: add
StackCheckLibNull, TestPointCheckDmaProtectionLib, and include
MinPlatformFeaturesPcd.dsc.inc. Enable PcdStandaloneMmEnable.
Add NetworkPkg network stack and SmbiosBasicDxe to DXE components.
Configure platform PCDs for QSP:
- PcdDefaultTerminalType: VT-100+ (type 2) for Simics serial console
- PcdConOutColumn/PcdConOutRow: 0 (use native terminal geometry)
- PcdAllowHttpConnections: TRUE for HTTP boot
- PcdPlatformBootTimeOut: configurable via build defines
(NO_PLATFORM_BOOT_DELAYS=0s, PLATFORM_BOOT_3S_DELAY=3s, default=10s)
- PcdHardwareErrorRecordLevel: 0 (no hardware error recording)
Signed-off-by: Robert Guenzel <robert.guenzel@intel.com>
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Move MinPlatformPkg from Intel specific directory into Platform
directory. This prepares the codebase for supporting additional
architectures and for separating Intel specific logic from the common
MinPlatformPkg framework.
Update build.cfg and build_bios.py to point to the new path for
MinPlatformPkg under Features.
Update CODEOWNERS and REVIWERES to new path.
Signed-off-by: Vishal Oliyil Kunnil <vishalo@qti.qualcomm.com>
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This patch fixes the debug statement so that it prints a 64-bit
base address completely.
Signed-off-by: Shankar C <shankar.c@amd.com>
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Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
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Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
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Remove SignedCapsulePkg from the CoreList of allowed
packages. Use of SignedCapsulePkg should be replaced
with FmpDevicePkg.
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
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Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
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Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
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Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
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Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
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Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
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Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
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Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
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Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
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Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
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Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
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Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
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Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
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Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
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Added missing <BR> command
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Corrected format (hopefully)
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License identifier states that file is under BSD-2-Clause-Patent
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Move them to DxeTestPointCheckDmaProtectionLib and
PeiTestPointCheckDmaProtectionLib.
Provide TestPointCheckDmaProtectionLibNull for platform that does not
have necessary packages for DmaProtection feature.
Signed-off-by: PaddyDeng <paddydeng@ami.com>
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This is because FvLib is moving from StandaloneMmPkg to MdePkg.
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
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Added check for AMD vs Intel processors to get proper SM Base value.
Signed-off-by: Brit Chesley <brit.chesley@amd.com>
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Removed unneeded include files and library classes.
Signed-off-by: Aaron Pop <aaronpop@microsoft.com>
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- In 5a16d243aa126721be61ca97059014b487fd8830 simplify the code flow
for removing "edk2basetools" supported along with the edk2 upstream.
- However, correct wrapper shell script path got removed unconscious,
it would cause the build failure due to "build" command not found.
- This patch would correct it from "BinPipWrappers" into "BinWrappers".
Signed-off-by: Jason1 Lin <jason1.lin@intel.com>
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Use SMBIOS_CACHE_SIZE and SMBIOS_CACHE_SIZE2 structures.
Signed-off-by: Sarah Walker <Sarah.Walker2@arm.com>
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edk2 is removing support for ARM32, so drop all
ARM32 code from edk2-platforms. This does not
change code copied from edk2 as-is.
Signed-off-by: Oliver Smith-Denny <osde@microsoft.com>
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PCD defined by *.dsc.inc works as default and should not override
platform specific PCD settings.
Move MinPlatform common *.dsc.inc to early place of BoardPkg DSC file
so Platform specific PCD settings will take effect (Override).
This is for resolving potential build and functionality issues due to
wrong PCD configuration.
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
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NULL library should not need to include BoardInitLib.h which requires
MinPlatformPkg.dec in INF
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
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Some builds failed with below error:
PcdFspWrapperBootMode is not defined in DSC file.
Fixing this issue by defining this PCD in MinPlatform common include
DSC file.
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
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SecBoardInitLibNull does not requires any package except MdePkg.dec
Signed-off-by: PaddyDeng <paddydeng@ami.com>
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Some platforms consuming MinPlatformPkg does not use FSP architecture.
Therefore does not have IntelFsp2WrapperPkg presents.
Signed-off-by: PaddyDeng <paddydeng@ami.com>
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GCC:*_GCC*_*_DLINK_FLAGS should be GCC:*_*_*_DLINK_FLAGS.
This patch is to correct it.
Signed-off-by: Star Zeng <star.zeng@intel.com>
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PeiSmmAccessLib installs gEfiPeiMmAccessPpiGuid which is not really consumed.
gEfiSmmSmramMemoryGuid guided HOB has been providing the SMRAM info and consumed
This patch is to remove PeiSmmAccessLib inclusion for SimicsOpenBoardPkg.
Signed-off-by: Star Zeng <star.zeng@intel.com>
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If multiple versions of Clang are installed, then prefer
using Clang + Mingw-w64 to compile firmware if it is available.
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
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- Adds [BuildOptions] entries needed to compile with Clang
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
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- Adds [BuildOptions] entries needed to compile with Clang
- Fix logical vs. bitwise comparison in AcpiPlatformVTDHooks.c
- Fix calling convention for GetThreadIdMsrValue() and
BdsBoardBeforeConsoleAfterTrustedConsoleCallback()
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
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- Adds [BuildsOptions] entries needed to compile with Clang
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
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Required for NX bit support.
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
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