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40 hoursPlatform/ARM: Share output directory selectionSudeep Holla19-42/+37
Use a common DSC include to honor EDK2_OUT_DIR across all ARM platforms. Keep the existing default paths, including the Juno and VExpress Standalone MM paths, when no override is supplied. Signed-off-by: Sudeep Holla <sudeep.holla@kernel.org>
6 daysPlatform/ARM/VExpressPkg: move TPM2 table generatorYeoreum Yun1-8/+8
The last three tables are specific to FVP RevC, while the TPM2 table is also supported on the FVP AEM platform. Therefore, move the TPM2 table to the appropriate location. Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
6 daysPlatform/ARM: Document GICv5 support for FVP_RevClevi.yun1-0/+195
Add documentation for enabling GICv5 support with FVP_RevC model. Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
6 daysPlatform/ARM/VExpressPkg: update PCI with IWBlevi.yun3-4/+65
Update PCI interrupt value from SPI to IWB and _PRT table entry. Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
6 daysPlatform/ARM/VExpressPkg: disable PC-LPI support when Gicv5 is presentlevi.yun1-2/+3
Currently, platform coordinated LPI isn't supported with gic-v5. Therefore, disable it. Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
6 daysPlatform/ARM/VExpressPkg: GICv5 ACPI supportSarah Walker5-39/+433
This patch add support for GICv5 in FVP_RevC model. For this: - add IRS, ITSv5, IWB information. - add DSDT for GicV5. - update IORT information. - update Platform repository when GICv5 is supported. Link: https://developer.arm.com/documentation/110379/1131/Base-Platform/FVP-Base-RevC-2xAEMvA-GICv5-platform-interrupt-assignments?lang=en [0] Signed-off-by: Sarah Walker <Sarah.Walker@arm.com>
6 daysPlatform/ARM/VExpressPkg: generate SRAT acpi tablelevi.yun2-2/+9
Generate SRAT table. Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
6 daysPlatform/ARM/VExpressPkg: fix PCIE interrupt idYeoreum Yun1-4/+4
According to FVP Base platform interrupt assignments [0], PCIE interrupt start from 200 and SPI offset 168. In the CM_ARCH_COMMON_PCI_INTERRUPT_MAP_INFO, interrupt information should be set with INTR_ID not SPI offset. Change PCIE interrupt-id according to spec. Link: [0] https://support.arm.com/documentation/110379/1132/Base-Platform/Base-Platform-interrupt-assignments Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
6 daysPlatform/ARM: change all file format to CRLFYeoreum Yun26-4736/+4736
Some of file inside of Platform/ARM mixed with LF/CRLF and this makes a great trouble to read/review code. Change all of file format to CRLF. Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
2026-09-09Platform/ARM: Drop reference to GICv3+-only driverArd Biesheuvel7-7/+7
The unified GIC driver has gone away, and has been replaced by the version that was formerly known as GicV3Dxe, which supports GICv3 and newer. So switch to the new name of the same driver. Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
2026-08-19Platform/ARM: change DIRECT_MSG_ARGS to ARM_FFA_ARGS for FtpmSmmYeoreum Yun1-23/+25
edk2 commit ("ArmPkg: StandaloneMmCoreEntryPoint: Use ARM_FFA_ARGS..")[0] changes the MISC services arguments from DIRECT_MSG_ARGS to ARM_FFA_ARGS. Apply this change in FtpmSmm. Link: [0] https://github.com/tianocore/edk2/pull/12867 Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
2026-07-29Platform/ARM/VExpressPkg: fix PlatformTpmLibTimerRead() result to msYeoreum Yun1-26/+56
Currently, PlatformTpmLibTimerRead() returns the raw ticks value. However, TCG TPM2 reference library [0] expects ms unit value not a raw tick value. To address this, change PlatformTpmLibTimerRead() to return MS value from system counter. Link: [0] https://github.com/TrustedComputingGroup/TPM/blob/main/TPMCmd/tpm/src/subsystem/Time.c#L68 Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
2026-07-27Platform/ARM/Features: add FWU reference spec linkLevi Yun1-0/+3
Add Firmware update reference specification link on the Reference section. Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
2026-07-27Platform/ARM: FwsMetadata: fix wrong loop for checking metadataYeoreum Yun1-1/+1
When the number of bank is lesser than the maximum bank number (4), bank state in the metadata for absent banks should be "INVALID" state. However, current loop condition for checking above doing with the nubmer real bank. So the validation loop itself becomes dead code. To check properly, fix this problem. Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
2026-07-27Platform/ARM: FwsMetadata: fix missing check for metadata validationYeoreum Yun1-1/+2
For a bank state, FWU_BANK_STATE_INVALID is valid state for partial update and it's one of validate value. Therefore, include FWU_BANK_STATE_INVALID as valid state bank can have. Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
2026-07-27Platform/ARM/Morello: Use ArmSmcccSocIdLib for SoC IDVarshit Pandya2-91/+10
Update SmbiosPlatformDxe to use ArmSmcccSocIdLib for retrieving the JEP106 identification code and SoC revision. Remove the duplicated SMCCC feature detection and SoC ID calls while retaining the MIDR fallback when the SMCCC SoC ID service is unavailable. Signed-off-by: Varshit Pandya <Varshit.Pandya@arm.com>
2026-07-21Platform/ARM: Add GptLib library mappingVarshit Pandya1-0/+3
The following edk2 change introduces a GptLib dependency to PartitionDxe and the TPM measure-boot libraries: MdeModulePkg, SecurityPkg: Fix GPT measurement mismatch (CVE-2024-13745) https://github.com/tianocore/edk2/pull/12745 Add the GptLib mapping to ArmVExpress.dsc.inc to resolve the new library class dependency and fix affected ARM platform builds. Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
2026-07-02Platform/ARM/VExpressPkg: change secure CRB base addressYeoreum Yun1-1/+1
TF-A commit f21705d3e "feat(measured-boot): calculate ev log size" changes the PLAT_ARM_FW_HANDOFF_EVENT_LOG_SIZE that effects the change of BL32_BASE. As a result, the secure CRB location which calculated from the BL32_BASE is also changed. To work with the latest, change the secure CRB base address. Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
2026-06-18Global: Include AcpiHelperMacros.h for ACPI helper macrosVarshit Pandya3-16/+16
Update platform ACPI table sources to include AcpiHelperMacros.h for the ACPI helper macros that moved out of AcpiLib.h. For files that only use the helper macros, replace the AcpiLib.h include with AcpiHelperMacros.h. For SbsaQemuAcpiDxe, keep AcpiLib.h because the driver also uses AcpiLib APIs, and add AcpiHelperMacros.h for the moved macro definitions. This change depends on the companion edk2 change: "EmbeddedPkg,MdeModulePkg,DynamicTablesPkg: Move ACPI helper macros" Tested: Affected platform DSCs: AARCH64 GCC NOOPT SGI affected platforms passed; other affected platforms fail due to missing local assets/dependencies unrelated to the include migration. Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
2026-06-17Updating Platform .dsc files to include Tpm2HelpLib.rdiaz2-0/+2
2026-05-28Global: Switch AArch64 platforms to CpuExceptionHandlerLibVishal Oliyil Kunnil1-2/+1
Replace ArmPkg DefaultExceptionHandlerLib and ArmExceptionLib with UefiCpuPkg/CpuExceptionHandlerLib across AArch64 platforms. Signed-off-by: Vishal Oliyil Kunnil <vishalo@qti.qualcomm.com>
2026-04-17Global: Consume ArmLib from MdePkgOliver Smith-Denny7-7/+7
edk2 is moving ArmLib to MdePkg. Update DSCs accordingly. Signed-off-by: Oliver Smith-Denny <osde@microsoft.com> [ardb: add missed instance in N1SdpPlatform.dsc] Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
2026-04-16Platform/ARM/JunoPkg: Remove support for static ACPI table.Varshit Pandya12-1475/+0
Juno has been using Dynamic Table Framework for quite a while now. There is no reason to keep static table support. Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
2026-03-30Platform/ARM/Drivers/BootMonFs: remove unused ImageCount variableYeoreum Yun1-3/+0
ImageCount doesn't use for anything in initialisation. Therefore, remove ImageCount variable otherwise it faces below build error with CLANGDWARF: edk2-platforms/Platform/ARM/Drivers/BootMonFs/BootMonFsImages.c:191:28: error: variable 'ImageCount' set but not used [-Werror,-Wunused-but-set-variable] Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
2026-03-30Platform/ARM/Drivers/NorFlashDxe: fix build failure with CLANGDWARFYeoreum Yun1-3/+11
When FVP platform is built with CLANGDWARF toolchain, below build error splat happens: edk2-platforms/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c:398:14: error: variable 'ProtocolGuid' is used uninitialized whenever 'if' condition is Fix this build failure. Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
2026-03-30Revert "Platform/ARM/Morello/FVP: Enable Semi hosting"VarshitPandya1-5/+0
This reverts commit fdf3277c62ddf82a812cc6c4b2a4ca346e914ffb, It added support for Semi Hosting while it was already present in the file.
2026-03-25Platform/ARM/VExpressPkg: Fix INF file header syntaxMichael D Kinney1-7/+7
INF files only support use '#' to indicate a comment line. Remove use of C-style /* */ comment block in INF. Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
2026-03-19Platform/ARM/VExpressPkg: enable PL111 LCDYeoreum Yun1-0/+3
Enable PL111 LCD for VExpressPkg platform by default. Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
2026-03-19Platform/ARM/VExpressPkg: add MEM_ACCESS_FLAGS_CPM flag for Root complex nodeVishnu Banavath1-1/+1
The PCIe subsystem is connected to CCI-550 [0], making it DMA-coherent in FVP RevC. Therefore, set EFI_ACPI_IORT_MEM_ACCESS_FLAGS_CPM in the memory access flags for the Root Complex node. Link: https://developer.arm.com/documentation/110379/1131/Base-Platform/Base-Platform-RevC/Base-Platform-RevC-block-diagram [0] Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
2026-03-19Platform/ARM/VExpress: add keyboard and mouseVishnu Banavath1-1/+26
This change is to add keyboard and mouse device details in Dsdt.asl Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
2026-03-19Platform/ARM/VExpressPkg: change PMU irq from SPI to PPIYeoreum Yun1-9/+13
The FVP models also support PMU IRQs as PPIs in addition to SPIs (See latest model documentation[0] which defines PMU overflow PPI as 23). Therefore, instead of using SPI for PMU IRQ, use PPI. Link: https://developer.arm.com/documentation/110379/1131/Base-Platform/Base-Platform-interrupt-assignments [0] Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>
2026-03-19Platform/ARM/Morello: Update Readme.mdVarshit Pandya1-3/+4
Update the Readme.md with the latest information. Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
2026-03-19Platfrom/ARM/Morello: Generate ASL description of CPU topologyVarshit Pandya7-141/+213
This patch: - Describes the _LPI states in the Configuration Manager of the Morello - Add the generator of a new SSDT table describing the CPU topology and its _LPI states - Removes the CPU topology description of the DSDT table Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
2026-03-19Platform/ARM/Morello/FVP: Enable Semi hostingVarshit Pandya1-0/+5
Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
2026-03-19Platform/ARM/Morello: Fix memory issues when parsing version stringWerner Lewis1-2/+18
Modification of PcdFirmwareVersionString violates memory permissions when building with GCC. This modification is removed to ensure that permissions are respected. Additional checks are added for memory allocations to avoid potential NULL pointer dereferencing. Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
2026-03-19Platform/ARM/Morello: Fix Type45 table version from compressed formatWerner Lewis1-4/+4
Resolves error where version may be displayed as unknown when the mainline flag is set. Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
2026-03-19Platform/ARM/Morello: Add Type45 SMBIOS table for TF-AWerner Lewis4-6/+71
TF-A version string in NT_FW_CONFIG is used to generate and install a Type 45 SMBIOS table for the component. Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
2026-03-19Platform/ARM/Morello: Add Type45 SMBIOS tables for MCC and PCCWerner Lewis3-0/+120
MCC and PCC versions in NT_FW_CONFIG are used to generate and install Type45 SMBIOS tables for each component. Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
2026-03-19Platform/ARM/Morello: Add Type45 SMBIOS table for SCP firmwareWerner Lewis8-20/+252
SCP firmware version from NT_FW_CONFIG is used to generate and install a Type45 SMBIOS table for the component. Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
2026-03-19Platform/ARM/Morello: Add Type45 SMBIOS table support for EDK IIWerner Lewis4-0/+331
Add firmware inventory information table support for Morello, parsing version information for EDK II and EDK II platforms. Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
2026-03-19Platform/ARM/Morello: Set SMBIOS version to 3.5Werner Lewis1-0/+4
SMBIOS version previously defaulted to 3.3 as specified in MdeModulePkg.dec. Morello requires an increase to 3.5 for addition of Type 45 Firmware Inventory Information tables. Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
2026-03-19Platform/ARM/Morello/SoC: Support cpuidle in ACPIsahil2-1/+134
This patch adds the necessary LPI state and method definitions to support cpuidle when the kernel is booted with ACPI enabled. Co-authored-by: Karl Meakin <karl.meakin@arm.com> Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
2026-03-19Platform/Morello: Add CPU container for Morello SoCsahil1-110/+120
The Morello platform includes two clusters with CPUs each. Add processor container devices for the two clusters and move the existing processor devices into respective processor containers. Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
2026-03-19Platform/ARM/Morello: Add UIDs to CoreSight devicesWerner Lewis1-0/+12
In ACPI, multiple instances of an IP block in the same namespace may be differentiated by the Unique Identifier (_UID) object. This must be unique across all devices with a common _HID or _CID. _UID objects are added for all CoreSight devices with multiple instances in Morello, so that each device can be uniquely identified. Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
2026-03-19Platform/ARM: Morello: Update for IORT revision macro renamingJagadeesh Ujja1-2/+2
The IORT Specification E.d updates the IORT table revision to 5. To reflect this change the IORT header file has been updated to rename the EFI_ACPI_IO_REMAPPING_TABLE_REVISION macro which was at Rev 0 to EFI_ACPI_IO_REMAPPING_TABLE_REVISION_00. Therefore, update the usage of EFI_ACPI_IO_REMAPPING_TABLE_REVISION macro in the Configuration Manager for Morello SoC to EFI_ACPI_IO_REMAPPING_TABLE_REVISION_00. Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
2026-03-19Platform/ARM/Morello: Using local definition of NorFlashPlatformLibHimanshu Sharma2-4/+4
With the version of NorFlashDxe defined in ArmPlatformPkg getting deprecated, switching usage of NorFlashPlatformLib defined in ArmPlatformPkg to it's local definition in Platform/ARM. Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
2026-03-19Platform/ARM/Morello: Add CoreSight bindingsWerner Lewis3-2/+478
PCDs are added for CoreSight devices on Morello. DSDT and configuration manager are updated to include the devices. Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
2026-03-19Platform/ARM/Morello: Populate Processor Version string dynamicallyVarshit Pandya2-9/+103
Populate the Processor Version string of SMBIOS TYPE4 table based on SoC revision obtained from the SoC ID. Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
2026-03-19Platform/ARM/Morello: Implement SMC calls to fetch the SoC IDChandni Cherukuri3-2/+123
If the SMCCC_ARCH_SOC_ID is supported, fetch the SoC ID from it else it is populated from the MIDR register. Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
2026-03-19Platform/ARM/Morello: Add LogoDxe to provide logo imagePatrik Berglund6-0/+223
LogoDxe.inf includes a BMP logo in the EFI file, the driver decodes the BMP file and provide the image via EDKII_PLATFORM_LOGO_PROTOCOL. Signed-off-by: Varshit Pandya <varshit.pandya@arm.com>
generated by cgit v1.2.3 (git 2.39.0) at 2026-09-30 09:24:28 +0300