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| author | Swee Ching Lim <swee.ching.lim@intel.com> | 2026-09-30 04:23:09 +0300 |
|---|---|---|
| committer | Swee Ching Lim <swee.ching.lim@intel.com> | 2026-09-30 04:23:09 +0300 |
| commit | fbb67527981b6c11b297467b5fa75a16db7b9d4f (patch) | |
| tree | 8e57354da49ab0e085c258fe50be3b358007e255 /WildcatLakeFspBinPkg/README.md | |
| parent | 121cd6f5ccba11c54aae5537729225acaae88e04 (diff) | |
| parent | 98426bfd958eb7397c474ff5d440dc9a1d146215 (diff) | |
| download | FSP-master.tar.xz | |
Diffstat (limited to 'WildcatLakeFspBinPkg/README.md')
| -rw-r--r-- | WildcatLakeFspBinPkg/README.md | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/WildcatLakeFspBinPkg/README.md b/WildcatLakeFspBinPkg/README.md new file mode 100644 index 0000000..c75bd6b --- /dev/null +++ b/WildcatLakeFspBinPkg/README.md @@ -0,0 +1,9 @@ +# WildcatLakeFspBinPkg +These FSP binaries are intended to be used for Intel® Core™ Series 3 (Code Named Wildcat Lake) for Edge Platforms. + +## Wildcat Lake Binary +For descriptions of the Intel® Core™ Series 3 (Code Named Wildcat Lake) for Edge Platforms. Please consult the table below: + +Directory Name | Intel® Core™ Series 3 (Code Named Wildcat Lake) for Edge Platforms SKU Description +:------------- | :------------------------- +IoT/WildcatLake | Wildcat Lake Embedded processors for Edge platforms |