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| author | Frank Tsao <Frank.Tsao@quantatw.com> | 2026-07-02 20:34:49 +0300 |
|---|---|---|
| committer | Amithash Prasad <amithash@meta.com> | 2026-07-09 21:36:05 +0300 |
| commit | c2dcb635dc7aae0fcaa88993927b00627a5d2929 (patch) | |
| tree | 443a8989fca38e44ae2032e70adf044d0473c644 /upstream-layers/meta-openembedded/meta-python/recipes-devtools/python/python3-unidecode | |
| parent | 0ae5af8a4323836e17f72417d3a6e33d5952f2f3 (diff) | |
| download | openbmc-c2dcb635dc7aae0fcaa88993927b00627a5d2929.tar.xz | |
meta-facebook: rainier: add CPU UART mux selection
Restore the CPU UART mux selection during Rainier early system
initialization as requested by RTP.
The BMC receives BIOS/host log from UART3. The actual UART source is
selected by setting HPM CPLD register value. The selected source can be
stored in /var/lib/uart_mux_value before AC power off.
During the early system initialization, read the saved source value and
restore the HPM CPLD UART mux register. Only values 0 through 5 are
accepted. If the saved value is missing or invalid, fall back to
source 0.
This allows the platform to restore the previous UART source after an
AC cycle before host power on.
Tested:
1. Write a valid UART mux source to /var/lib/uart_mux_value
2. Performed an AC cycle and confirmed the CPLD UART mux register was
restored through I2C during early system initialization.
3. Verified that an invalid or missing saved value falls back to
source 0.
Change-Id: I5b80f23be026f2133d1908fc99746e2118fcf307
Signed-off-by: Frank Tsao <Frank.Tsao@quantatw.com>
Diffstat (limited to 'upstream-layers/meta-openembedded/meta-python/recipes-devtools/python/python3-unidecode')
0 files changed, 0 insertions, 0 deletions