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path: root/drivers/gpu/drm/i915/display/intel_dp.h
AgeCommit message (Expand)AuthorFilesLines
2022-03-08drm/i915/display: Move DRRS code its own fileJosé Roberto de Souza1-11/+0
2021-12-08drm/i915/dp: Perform 30ms delay after source OUI writeLyude Paul1-0/+2
2021-04-28drm/i915/hdcp: add intel_dp_hdcp.h and rename init accordinglyJani Nikula1-3/+0
2021-03-19drm/i915: Introduce g4x_dp.cVille Syrjälä1-6/+0
2021-03-19drm/i915: Split intel_ddi_encoder_reset() from intel_dp_encoder_reset()Ville Syrjälä1-1/+0
2021-03-19drm/i915: Relocate intel_dp_program_link_training_pattern()Ville Syrjälä1-4/+0
2021-01-21drm/i915/dp: split out aux functionality to intel_dp_aux.cJani Nikula1-1/+0
2021-01-19drm/i915: Fix the PHY compliance test vs. hotplug mishapVille Syrjälä1-0/+1
2021-01-14drm/i915/pps: abstract panel power sequencer from intel_dp.cJani Nikula1-4/+1
2021-01-13drm/i915/dp: Move intel_dp_set_signal_levels() to intel_dp_link_training.cImre Deak1-3/+0
2020-12-22drm/i915/display: Let PCON convert from RGB to YCbCr if it canAnkit Nautiyal1-1/+2
2020-12-22drm/i915/display: Configure PCON for DSC1.1 to DSC1.2 encodingAnkit Nautiyal1-0/+2
2020-12-22drm/i915: Add support for starting FRL training for HDMI2.1 via PCONAnkit Nautiyal1-0/+2
2020-11-18drm/i915/dp: Allow big joiner modes in intel_dp_mode_valid(), v3.Maarten Lankhorst1-0/+1
2020-10-20drm/i915: s/intel_dp_sink_dpms/intel_dp_set_power/Ville Syrjälä1-1/+1
2020-10-12drm/i915: Switch to LTTPR non-transparent mode link trainingImre Deak1-2/+0
2020-10-12drm/i915: Simplify the link training functionsImre Deak1-2/+0
2020-10-09drm/i915: Wait for eDP panel power cycle delay on reboot on all platformsVille Syrjälä1-0/+1
2020-10-06drm/i915: Add an encoder hook to sanitize its state during init/resumeImre Deak1-0/+2
2020-10-06drm/i915: Move the initial fastset commit check to encoder hooksImre Deak1-0/+3
2020-10-01drm/i915: Plumb crtc_state to link trainingVille Syrjälä1-4/+6
2020-10-01drm/i915: Make intel_dp_process_phy_request() staticVille Syrjälä1-1/+0
2020-09-24drm/i915: Decouple intel_dp_{min,output}_bpp() from crtc_stateVille Syrjälä1-1/+2
2020-09-17drm/i915: Configure DP 1.3+ protocol converted HDMI modeVille Syrjälä1-0/+1
2020-09-12Merge drm/drm-next into drm-intel-next-queuedRodrigo Vivi1-1/+0
2020-09-01drm/i915: Factor out HDCP shim functions from dp for use by dp_mstSean Paul1-0/+3
2020-09-01drm/i915: Use ddi_update_pipe in intel_dp_mstSean Paul1-0/+6
2020-09-01drm/i915/dp: Extract drm_dp_read_dpcd_caps()Lyude Paul1-1/+0
2020-08-27drm/i915/display: Disable DRRS when needed in fastsetsJosé Roberto de Souza1-0/+2
2020-07-02drm/i915/display: prefer dig_port to reference intel_digital_portLucas De Marchi1-2/+2
2020-06-03drm/i915: Add {preemph,voltage}_max() vfuncsVille Syrjälä1-4/+0
2020-05-14drm/i915/dp: Add compute routine for DP PSR VSC SDPGwan-gyeong Mun1-0/+8
2020-05-14drm/i915: Program DP SDPs with computed configsGwan-gyeong Mun1-6/+0
2020-05-14drm/i915/dp: Read out DP SDPsGwan-gyeong Mun1-0/+3
2020-04-16Merge tag 'topic/phy-compliance-2020-04-08' of git://anongit.freedesktop.org/...Joonas Lahtinen1-0/+1
2020-04-08drm/i915/dp: Program vswing, pre-emphasis, test-patternAnimesh Manna1-0/+1
2020-03-20drm/i915/dp: Add writing of DP SDPsGwan-gyeong Mun1-0/+3
2020-02-27drm/i915: significantly reduce the use of <drm/i915_drm.h>Jani Nikula1-2/+0
2019-10-15drm/i915/dp: Program an Infoframe SDP Header and DB for HDR Static MetadataGwan-gyeong Mun1-0/+3
2019-10-15drm/i915/dp: Add support of BT.2020 Colorimetry to DP MSAGwan-gyeong Mun1-0/+2
2019-10-15drm/i915/dp: Extend program of VSC Header and DB for Colorimetry FormatGwan-gyeong Mun1-0/+3
2019-09-25drm/i915/dp: Fix dsc bpp calculations, v5.Maarten Lankhorst1-4/+2
2019-08-30drm: Move port definition back to i915 headerRamalingam C1-0/+1
2019-07-01drm/i915: Move the TypeC port handling code to a separate fileImre Deak1-2/+0
2019-06-17drm/i915: move modesetting output/encoder code under display/Jani Nikula1-0/+123
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