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BMC/Intel-BMC/linux.git
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dev-5.10.46-intel
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dev-5.15-intel
dev-5.2
dev-5.3
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master
Intel OpenBMC Linux kernel source tree (mirror)
Andrey V.Kosteltsev
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path:
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/
drivers
/
clk
/
meson
Age
Commit message (
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Author
Files
Lines
2018-06-09
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...
Linus Torvalds
20
-309
/
+586
2018-05-21
clk: meson: axg: let mpll clocks round closest
Jerome Brunet
1
-0
/
+4
2018-05-21
clk: meson: mpll: add round closest support
Jerome Brunet
2
-5
/
+22
2018-05-21
clk: meson: meson8b: mark fclk_div2 gate clocks as CLK_IS_CRITICAL
Martin Blumenstingl
1
-0
/
+7
2018-05-18
clk: meson: use SPDX license identifiers consistently
Jerome Brunet
13
-238
/
+20
2018-05-15
clk: meson: drop CLK_SET_RATE_PARENT flag
Yixun Lan
1
-1
/
+1
2018-05-15
clk: meson-axg: Add AO Clock and Reset controller driver
Qiufang Dai
4
-1
/
+195
2018-05-15
clk: meson: aoclk: refactor common code into dedicated file
Yixun Lan
6
-62
/
+160
2018-05-15
clk: meson: migrate to devm_of_clk_add_hw_provider API
Yixun Lan
1
-1
/
+1
2018-05-15
clk: meson: gxbb: add the video decoder clocks
Maxime Jourdan
2
-1
/
+119
2018-05-15
clk: meson: meson8b: add support for the NAND clocks
Martin Blumenstingl
2
-1
/
+58
2018-05-02
Merge tag 'meson-clk-fixes-4.17-1' of https://github.com/BayLibre/clk-meson i...
Stephen Boyd
2
-4
/
+3
2018-04-25
clk: meson: meson8b: fix meson8b_cpu_clk parent clock name
Martin Blumenstingl
1
-1
/
+2
2018-04-25
clk: meson: meson8b: fix meson8b_fclk_div3_div clock name
Martin Blumenstingl
1
-1
/
+1
2018-04-25
clk: meson: drop meson_aoclk_gate_regmap_ops
Yixun Lan
1
-2
/
+0
2018-04-16
clk: meson: honor CLK_MUX_ROUND_CLOSEST in clk_regmap
Jerome Brunet
1
-1
/
+10
2018-03-15
clk: meson: Drop unused local variable and add static
Stephen Boyd
3
-11
/
+10
2018-03-13
clk: meson: clean-up clk81 clocks
Jerome Brunet
2
-8
/
+4
2018-03-13
clk: meson: add fdiv clock gates
Jerome Brunet
6
-33
/
+278
2018-03-13
clk: meson: add mpll pre-divider
Jerome Brunet
6
-13
/
+65
2018-03-13
clk: meson: axg: add hifi pll clock
Jerome Brunet
2
-1
/
+56
2018-03-13
clk: meson: add ROUND_CLOSEST to the pll driver
Jerome Brunet
2
-4
/
+15
2018-03-13
clk: meson: add gp0 frac parameter for axg and gxl
Jerome Brunet
2
-2
/
+12
2018-03-13
clk: meson: improve pll driver results with frac
Jerome Brunet
2
-59
/
+91
2018-03-13
clk: meson: remove special gp0 lock loop
Jerome Brunet
4
-15
/
+1
2018-03-13
clk: meson: poke pll CNTL last
Jerome Brunet
2
-3
/
+3
2018-03-13
clk: meson: add fractional part of meson8b fixed_pll
Jerome Brunet
1
-0
/
+5
2018-03-13
clk: meson: use hhi syscon if available
Jerome Brunet
3
-24
/
+60
2018-03-13
clk: meson: remove obsolete cpu_clk
Jerome Brunet
3
-190
/
+1
2018-03-13
clk: meson: rework meson8b cpu clock
Jerome Brunet
2
-61
/
+119
2018-03-13
clk: meson: split divider and gate part of mpll
Jerome Brunet
8
-118
/
+197
2018-03-13
clk: meson: migrate plls clocks to clk_regmap
Jerome Brunet
5
-530
/
+535
2018-03-13
clk: meson: migrate the audio divider clock to clk_regmap
Jerome Brunet
3
-68
/
+30
2018-03-13
clk: meson: migrate mplls clocks to clk_regmap
Jerome Brunet
5
-354
/
+313
2018-03-13
clk: meson: add regmap helpers for parm
Jerome Brunet
1
-0
/
+16
2018-03-13
clk: meson: migrate muxes to clk_regmap
Jerome Brunet
3
-213
/
+184
2018-03-13
clk: meson: migrate dividers to clk_regmap
Jerome Brunet
3
-159
/
+142
2018-03-13
clk: meson: migrate gates to clk_regmap
Jerome Brunet
5
-195
/
+206
2018-03-13
clk: meson: add regmap to the clock controllers
Jerome Brunet
4
-12
/
+52
2018-03-13
clk: meson: remove superseded aoclk_gate_regmap
Jerome Brunet
2
-56
/
+0
2018-03-13
clk: meson: switch gxbb ao_clk to clk_regmap
Jerome Brunet
4
-12
/
+12
2018-03-13
clk: meson: add regmap clocks
Jerome Brunet
4
-0
/
+282
2018-03-13
clk: meson: remove obsolete comments
Jerome Brunet
3
-12
/
+0
2018-03-13
clk: meson: only one loop index is necessary in probe
Jerome Brunet
3
-15
/
+14
2018-03-13
clk: meson: use devm_of_clk_add_hw_provider
Jerome Brunet
3
-6
/
+7
2018-03-13
clk: meson: use dev pointer where possible
Jerome Brunet
2
-5
/
+5
2018-02-12
clk: meson: add axg misc bit to the mpll driver
Jerome Brunet
3
-0
/
+28
2018-02-12
clk: meson: axg: fix the od shift of the sys_pll
Yixun Lan
1
-1
/
+1
2018-02-12
clk: meson: axg: add the fractional part of the fixed_pll
Jerome Brunet
1
-0
/
+5
2018-02-12
clk: meson: gxbb: add the fractional part of the fixed_pll
Jerome Brunet
1
-0
/
+5
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